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* Implement instructions MULT, MULTU, DIV, DIVU.Pavel Pisa2019-02-03
* Include test for jump and link processing.Pavel Pisa2019-02-02
* Add test for forwarding in ALU operations.Pavel Pisa2019-02-02
* Correct ALU test for SUB exception.Pavel Pisa2019-02-02
* Implement LUIKarel Kočí2018-04-08
* Integrate cache with rest of the machine coreKarel Kočí2018-04-08
* Add initial implementatio of cachesKarel Kočí2018-04-07
* Use whole words in memoryKarel Kočí2018-04-05
* Fix signextend in coreKarel Kočí2018-02-14
* Cleanup some todos in codeKarel Kočí2018-01-15
* Fix program loader testKarel Kočí2018-01-15
* Fix SRA and SRAV instructionsKarel Kočí2018-01-15
* Allow delay slot disable for non-pipelined coreKarel Kočí2018-01-03
* Remove some obsolete filesKarel Kočí2018-01-01
* Put qtmips_machine to machine namespaceKarel Kočí2017-12-17
* Fix test for JRKarel Kočí2017-12-12
* Implement some store and load instructionsKarel Kočí2017-12-12
* Implement branch and jump instructionsKarel Kočí2017-12-12
* Add crude implementation of MOV* instructionsKarel Kočí2017-11-25
* Implement instructions for moving from and to HI and LO registersKarel Kočí2017-11-25
* Fix SLTU instructionKarel Kočí2017-11-25
* Test pipelined coreKarel Kočí2017-11-25
* Implement some logical operationsKarel Kočí2017-11-21
* Implement some immediate arithmetic instructionsKarel Kočí2017-11-21
* Implement tests for few more arithmetic instructionsKarel Kočí2017-11-21
* Implement and test ADDKarel Kočí2017-11-21
* Add possibility to compare memory and registers stateKarel Kočí2017-11-21
* Another huge pile of work for about two monthsKarel Kočí2017-11-19
* Just something I had staggedKarel Kočí2017-11-19
* Add some more instructions to be decoded and arithmetic I testKarel Kočí2017-09-05
* Use QString and QVector instead of std ones and moreKarel Kočí2017-09-02
* Handle endianness in memory correctlyKarel Kočí2017-08-31
* Initial commitKarel Kočí2017-08-30
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