aboutsummaryrefslogtreecommitdiff
path: root/qtmips_machine/tests
Commit message (Expand)AuthorAge
* Change single cycle core with delay slot to use separate fetch stage.Pavel Pisa2019-03-26
* Correct write through spelling. Reported by Richard Susta.Pavel Pisa2019-03-25
* Make use of QVERIFY_EXCEPTION_THROWN conditional, it is not available on Ubun...Pavel Pisa2019-03-15
* Switch to static libraries by default and ensure application rebuild when a l...Pavel Pisa2019-03-15
* Fix LB and LH sign extension and LH/SH mask calculation.Pavel Pisa2019-03-13
* Added test for LWR, LWL, SWR and SWL instructions.Pavel Pisa2019-02-21
* Distinguish between write-through cache with allocate and update only if hit.Pavel Pisa2019-02-20
* Update project files to adapt for release and debug libraries location for Wi...Pavel Pisa2019-02-19
* Pass arithmetic exception trough pipeline and implement trap support and inst...Pavel Pisa2019-02-17
* Implement EXT instruction used in GLIBC startup.Pavel Pisa2019-02-15
* Add ELF library even to the final executables linking to allow build with sta...Pavel Pisa2019-02-12
* Correct build for LLVM.Fanda Vacek2019-02-09
* Include test for BGEZ, BGTZ, BLEZ, BLTZ, BEQ and BNE.Pavel Pisa2019-02-05
* Correct shift operation and make ALU_OP_MOVZ and ALU_OP_MOVN encoding indepen...Pavel Pisa2019-02-05
* Unified instructions table and access type move to machinedefs.h .Pavel Pisa2019-02-04
* Include more complex insert-sort test which checks memory and cache.Pavel Pisa2019-02-04
* Simplify core test by use of common function to run test machine.Pavel Pisa2019-02-04
* Add license to the source files.Pavel Pisa2019-02-04
* Implement instructions MULT, MULTU, DIV, DIVU.Pavel Pisa2019-02-03
* Include test for jump and link processing.Pavel Pisa2019-02-02
* Add test for forwarding in ALU operations.Pavel Pisa2019-02-02
* Correct ALU test for SUB exception.Pavel Pisa2019-02-02
* Implement LUIKarel Kočí2018-04-08
* Integrate cache with rest of the machine coreKarel Kočí2018-04-08
* Add initial implementatio of cachesKarel Kočí2018-04-07
* Use whole words in memoryKarel Kočí2018-04-05
* Fix signextend in coreKarel Kočí2018-02-14
* Cleanup some todos in codeKarel Kočí2018-01-15
* Fix program loader testKarel Kočí2018-01-15
* Fix SRA and SRAV instructionsKarel Kočí2018-01-15
* Allow delay slot disable for non-pipelined coreKarel Kočí2018-01-03
* Remove some obsolete filesKarel Kočí2018-01-01
* Put qtmips_machine to machine namespaceKarel Kočí2017-12-17
* Fix test for JRKarel Kočí2017-12-12
* Implement some store and load instructionsKarel Kočí2017-12-12
* Implement branch and jump instructionsKarel Kočí2017-12-12
* Add crude implementation of MOV* instructionsKarel Kočí2017-11-25
* Implement instructions for moving from and to HI and LO registersKarel Kočí2017-11-25
* Fix SLTU instructionKarel Kočí2017-11-25
* Test pipelined coreKarel Kočí2017-11-25
* Implement some logical operationsKarel Kočí2017-11-21
* Implement some immediate arithmetic instructionsKarel Kočí2017-11-21
* Implement tests for few more arithmetic instructionsKarel Kočí2017-11-21
* Implement and test ADDKarel Kočí2017-11-21
* Add possibility to compare memory and registers stateKarel Kočí2017-11-21
* Another huge pile of work for about two monthsKarel Kočí2017-11-19
* Just something I had staggedKarel Kočí2017-11-19
* Add some more instructions to be decoded and arithmetic I testKarel Kočí2017-09-05
* Use QString and QVector instead of std ones and moreKarel Kočí2017-09-02
* Handle endianness in memory correctlyKarel Kočí2017-08-31