| Commit message (Expand) | Author | Age |
* | Implemented base for exception handling. | Pavel Pisa | 2019-02-06 |
* | Resolve some memory leaks found by Valgrind. | Pavel Pisa | 2019-02-06 |
* | Provide at least partial cleanup after QtMipsMachine. | Pavel Pisa | 2019-02-06 |
* | Implement simple address-space ranges registration and example peripheral. | Pavel Pisa | 2019-02-06 |
* | Correct registers order in conversion to text for branch instructions. | Pavel Pisa | 2019-02-06 |
* | No reorder has to be specified else addi is moved to j delay slot. | Pavel Pisa | 2019-02-05 |
* | Include test for BGEZ, BGTZ, BLEZ, BLTZ, BEQ and BNE. | Pavel Pisa | 2019-02-05 |
* | Reorganize PC handling and implement full REGIMM decode. | Pavel Pisa | 2019-02-05 |
* | Correct shift operation and make ALU_OP_MOVZ and ALU_OP_MOVN encoding indepen... | Pavel Pisa | 2019-02-05 |
* | Make instruction to text conversion more generic. | Pavel Pisa | 2019-02-05 |
* | Rewrite instruction decoding to be generic and mostly architecture independent. | Pavel Pisa | 2019-02-05 |
* | Setup initial PC according executable entry form ELF file if it is non zero. | Pavel Pisa | 2019-02-04 |
* | Define uncached region in range from 0xf0000000 to 0xffffffff. | Pavel Pisa | 2019-02-04 |
* | Remove almost all direct access to opcode and function from the core. | Pavel Pisa | 2019-02-04 |
* | Take into account actual requirements for rs, rt and rd write for individual ... | Pavel Pisa | 2019-02-04 |
* | Unified instructions table and access type move to machinedefs.h . | Pavel Pisa | 2019-02-04 |
* | Include more complex insert-sort test which checks memory and cache. | Pavel Pisa | 2019-02-04 |
* | Primitive implementation of cache instruction. | Pavel Pisa | 2019-02-04 |
* | Simplify core test by use of common function to run test machine. | Pavel Pisa | 2019-02-04 |
* | Add license to the source files. | Pavel Pisa | 2019-02-04 |
* | Correct write-back cache behavior. | Pavel Pisa | 2019-02-04 |
* | Correct memory view updates for uncached and write-through case. | Pavel Pisa | 2019-02-03 |
* | Implement BREAK instruction to stop continuous execution. | Pavel Pisa | 2019-02-03 |
* | Implement instructions MULT, MULTU, DIV, DIVU. | Pavel Pisa | 2019-02-03 |
* | Implement realistic hazard resolution for JR, JALR, BEQ, BNE, BLTZ, BGEZ inst... | Pavel Pisa | 2019-02-02 |
* | Include test for jump and link processing. | Pavel Pisa | 2019-02-02 |
* | Add test for forwarding in ALU operations. | Pavel Pisa | 2019-02-02 |
* | Correct ALU test for SUB exception. | Pavel Pisa | 2019-02-02 |
* | Include support for JALR support. | Pavel Pisa | 2019-01-31 |
* | Initial support for JAL. | Pavel Pisa | 2019-01-31 |
* | Correct signed arithmetic overflow exception. | Pavel Pisa | 2019-01-31 |
* | Display rs, rt, rd and write register number in all stages. | Pavel Pisa | 2019-01-31 |
* | Correct processing of ORI, ANDI, XORI instructions which require zero-extende... | Pavel Pisa | 2019-01-31 |
* | Do not replace rt by forward if instruction in T_R or store. | Pavel Pisa | 2019-01-30 |
* | Display execution stage forward signals in the view. | Pavel Pisa | 2019-01-30 |
* | Correct hazards processing. | Pavel Pisa | 2019-01-30 |
* | Specify rpath during linking to find qtmips_machine library without install. | Pavel Pisa | 2019-01-30 |
* | Hide some values that shouldn't been visible in no pipelined version | Karel Kočí | 2018-06-20 |
* | Fix value position for non-pipelined core | Karel Kočí | 2018-05-24 |
* | Add few more labels | Karel Kočí | 2018-05-24 |
* | Add few additional labels | Karel Kočí | 2018-05-24 |
* | Add buses statis views | Karel Kočí | 2018-05-24 |
* | Add cache view renderer | Karel Kočí | 2018-05-23 |
* | Ignore hazard unit for now | Karel Kočí | 2018-05-23 |
* | Add cache statistics | Karel Kočí | 2018-05-23 |
* | Fix load and store instructions | Karel Kočí | 2018-05-02 |
* | Initial implementation of cache view | Karel Kočí | 2018-04-17 |
* | Drop unneeded parameter from CoreViewScene constructor | Karel Kočí | 2018-04-17 |
* | Fix angle scroll speed | Karel Kočí | 2018-04-17 |
* | Store memory and program view address position | Karel Kočí | 2018-04-17 |