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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-04 22:03:38 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-04 22:03:38 +0100 |
commit | 8c7a41702faf6760c74382ae269f0bf4603a0abe (patch) | |
tree | da207dcf5cae0dc64982584403c6508d5ce91c3d | |
parent | d3363c3430029eba44464469176b3b27bb12089a (diff) | |
download | qtmips-8c7a41702faf6760c74382ae269f0bf4603a0abe.tar.gz qtmips-8c7a41702faf6760c74382ae269f0bf4603a0abe.tar.bz2 qtmips-8c7a41702faf6760c74382ae269f0bf4603a0abe.zip |
Define uncached region in range from 0xf0000000 to 0xffffffff.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
-rw-r--r-- | qtmips_machine/cache.cpp | 10 | ||||
-rw-r--r-- | qtmips_machine/cache.h | 2 |
2 files changed, 10 insertions, 2 deletions
diff --git a/qtmips_machine/cache.cpp b/qtmips_machine/cache.cpp index 3fbfc3f..7925dc0 100644 --- a/qtmips_machine/cache.cpp +++ b/qtmips_machine/cache.cpp @@ -41,6 +41,8 @@ Cache::Cache(Memory *m, const MachineConfigCache *cc, unsigned memory_access_pen mem = m; access_pen_r = memory_access_penalty_r; access_pen_w = memory_access_penalty_w; + uncached_start = 0xf0000000; + uncached_last = 0xffffffff; // Zero hit and miss rate hit_read = 0; hit_write = 0; @@ -77,7 +79,9 @@ Cache::Cache(Memory *m, const MachineConfigCache *cc, unsigned memory_access_pen bool Cache::wword(std::uint32_t address, std::uint32_t value) { bool changed; - if (!cnf.enabled()) { + + if (!cnf.enabled() || + (address >= uncached_start && address <= uncached_last)) { return mem->write_word(address, value); } @@ -90,8 +94,10 @@ bool Cache::wword(std::uint32_t address, std::uint32_t value) { } std::uint32_t Cache::rword(std::uint32_t address) const { - if (!cnf.enabled()) + if (!cnf.enabled() || + (address >= uncached_start && address <= uncached_last)) { return mem->read_word(address); + } std::uint32_t data; access(address, &data, false); diff --git a/qtmips_machine/cache.h b/qtmips_machine/cache.h index 0859bd4..5e19e10 100644 --- a/qtmips_machine/cache.h +++ b/qtmips_machine/cache.h @@ -74,6 +74,8 @@ private: MachineConfigCache cnf; Memory *mem; unsigned access_pen_r, access_pen_w; + std::uint32_t uncached_start; + std::uint32_t uncached_last; struct cache_data { bool valid, dirty; |