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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-04 13:19:10 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-04 13:19:10 +0100
commit11e55482f80e5bf7df19f845c2d4faf5a9a6010c (patch)
treeed6e21378212c2386c976367200584ea8c46f8e2
parentfed3a4f559984ec77961f6d5556e183db6f41a2d (diff)
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Primitive implementation of cache instruction.
When any variant of cache instruction is detected flush and invalidate whole data cache. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
-rw-r--r--qtmips_machine/core.cpp6
-rw-r--r--qtmips_machine/instruction.cpp2
-rw-r--r--qtmips_machine/memory.h3
3 files changed, 7 insertions, 4 deletions
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp
index 2850e32..839def2 100644
--- a/qtmips_machine/core.cpp
+++ b/qtmips_machine/core.cpp
@@ -112,7 +112,7 @@ static const struct DecodeMap dmap[] = {
NOPE, // 44
NOPE, // 45
NOPE, // SWR
- NOPE, // 47
+ { .flags = DM_SUPPORTED | DM_ALUSRC, .alu = ALU_OP_ADDU, .mem_ctl = MemoryAccess::AC_CACHE_OP }, // CACHE
NOPE, // 48
NOPE, // 49
NOPE, // 50
@@ -302,7 +302,9 @@ struct Core::dtMemory Core::memory(const struct dtExecute &dt) {
emit instruction_memory(dt.inst);
std::uint32_t towrite_val = dt.alu_val;
- if (dt.memwrite)
+ if (dt.memctl == MemoryAccess::AC_CACHE_OP)
+ mem_data->sync();
+ else if (dt.memwrite)
mem_data->write_ctl(dt.memctl, dt.alu_val, dt.val_rt);
else if (dt.memread)
towrite_val = mem_data->read_ctl(dt.memctl, dt.alu_val);
diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp
index baae4bc..5743c69 100644
--- a/qtmips_machine/instruction.cpp
+++ b/qtmips_machine/instruction.cpp
@@ -103,7 +103,7 @@ static const struct InstructionMap instruction_map[] = {
IM_UNKNOWN, // 44
IM_UNKNOWN, // 45
{"SWR", IT_I, true, .flags = IMF_MEM},
- IM_UNKNOWN, // 47
+ {"CACHE", IT_I, true, .flags = IMF_MEM}, // 47
IM_UNKNOWN, // 48
IM_UNKNOWN, // 49
IM_UNKNOWN, // 50
diff --git a/qtmips_machine/memory.h b/qtmips_machine/memory.h
index 11832fb..aa75b18 100644
--- a/qtmips_machine/memory.h
+++ b/qtmips_machine/memory.h
@@ -61,7 +61,8 @@ public:
AC_HALFWORD,
AC_WORD,
AC_BYTE_UNSIGNED,
- AC_HALFWORD_UNSIGNED
+ AC_HALFWORD_UNSIGNED,
+ AC_CACHE_OP,
};
void write_ctl(enum AccessControl ctl, std::uint32_t offset, std::uint32_t value);
std::uint32_t read_ctl(enum AccessControl ctl, std::uint32_t offset) const;