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* Ensure that cache view and memory status are updated after cache flush.Pavel Pisa2019-02-21
* Added test for LWR, LWL, SWR and SWL instructions.Pavel Pisa2019-02-21
* Add burst time and store timing in the config.Pavel Pisa2019-02-21
* Adjust label of PC to R31 and add jump to reg.Pavel Pisa2019-02-20
* Distinguish between write-through cache with allocate and update only if hit.Pavel Pisa2019-02-20
* Update project files to adapt for release and debug libraries location for Wi...Pavel Pisa2019-02-19
* Update MultiText to use setPointSize too.Pavel Pisa2019-02-19
* pointSize -> pixelSizeFanda Vacek2019-02-19
* variable font sizeFanda Vacek2019-02-19
* The sizeHint seems to not be affected by invisible zero size problem.Pavel Pisa2019-02-19
* Clear LFU statistic for the kicked out cache-line.Pavel Pisa2019-02-18
* Add unlimited checkbox to the tool-bar.Pavel Pisa2019-02-18
* Report forward and stall for branches and add forward to execution phase.Pavel Pisa2019-02-18
* Correct ADD operation to map to ALU variant with overflow checking.Pavel Pisa2019-02-18
* Visualize request to stall and stall in execution phase and exception sources.Pavel Pisa2019-02-18
* Stall the pipeline even for branch which requires memory read as argument.Pavel Pisa2019-02-18
* Update homepage to point to CVUT GitHub repository.Pavel Pisa2019-02-18
* Do not update instruction in the decode stage when stalled.Pavel Pisa2019-02-17
* docs: more clarification how to use compillersPavel Pisa2019-02-17
* docs: startup code for both PIC and non-PIC environments.Pavel Pisa2019-02-17
* Ignore LWC1, LWD1, SWC1 and SDC1 instructions.Pavel Pisa2019-02-17
* Pass arithmetic exception trough pipeline and implement trap support and inst...Pavel Pisa2019-02-17
* Change RGB LEDs signals and slots to unsigned value.Pavel Pisa2019-02-16
* Correct final loop label in documentation.Pavel Pisa2019-02-16
* Enable copy from memory and program views.Pavel Pisa2019-02-15
* System calls stubs for brk and mmap2.Pavel Pisa2019-02-15
* Multiply and accumulate and CLZ/CLO operations added.Pavel Pisa2019-02-15
* Implement EXT instruction used in GLIBC startup.Pavel Pisa2019-02-15
* Core: move complex memory operation to own function and implement LWL, LWR, S...Pavel Pisa2019-02-15
* Fill the rest of ALU opcode table to file all 64 entries.Pavel Pisa2019-02-14
* The conversion of address has to use toULong to allow access to the second pa...Pavel Pisa2019-02-14
* Correct program loader to open ELF file in binary mode on Windows.Pavel Pisa2019-02-14
* Clarify KNOBS_8BIT register.Pavel Pisa2019-02-14
* README: correct code snippets formatting.Pavel Pisa2019-02-14
* Position hit and miss counters to left to fit in the diagram box a little lon...Pavel Pisa2019-02-14
* Correct typo.Pavel Pisa2019-02-14
* Ignore PREF instruction.Pavel Pisa2019-02-14
* Correct code snippets formatting.Pavel Pisa2019-02-14
* Make dosc word in README to be link to documentation directory.Pavel Pisa2019-02-14
* Document which executable formats QtMips accepts.Pavel Pisa2019-02-14
* Typo corrected.Pavel Pisa2019-02-14
* Add link to thesis and subject pages in README.Pavel Pisa2019-02-14
* README.md updatedPavel Pisa2019-02-14
* Implemented graphic representation and update of line and RGB LEDs.Pavel Pisa2019-02-14
* Implement write syscall and signal written characters to terminal.Pavel Pisa2019-02-14
* Implemented sys_set_thread_area and sys_writev syscalls.Pavel Pisa2019-02-14
* Implement function to setup core C0 userlocal register.Pavel Pisa2019-02-14
* Implement MUL operation which stores result to the register.Pavel Pisa2019-02-14
* Ensure that single step does not run chunk of instructions instead of one.Pavel Pisa2019-02-13
* Initial attempt to as operating system syscall handler.Pavel Pisa2019-02-13
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