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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-21 13:57:10 +0100 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-21 13:57:10 +0100 |
| commit | 1079afe82fae73f1ee61266b0b573b95e8c1ce48 (patch) | |
| tree | 91eb5fdcbfa6eff3cc2a4deb8fec3558c5961c1b | |
| parent | da3d8fdd609be7cd1836be717032555af0732b88 (diff) | |
| download | qtmips-1079afe82fae73f1ee61266b0b573b95e8c1ce48.tar.gz qtmips-1079afe82fae73f1ee61266b0b573b95e8c1ce48.tar.bz2 qtmips-1079afe82fae73f1ee61266b0b573b95e8c1ce48.zip | |
Added test for LWR, LWL, SWR and SWL instructions.
The reference data has been obtained by running application
under userspace MIPS QEMU.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
| -rw-r--r-- | qtmips_machine/tests/testcore.cpp | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/qtmips_machine/tests/testcore.cpp b/qtmips_machine/tests/testcore.cpp index 01307a5..86a9726 100644 --- a/qtmips_machine/tests/testcore.cpp +++ b/qtmips_machine/tests/testcore.cpp @@ -825,6 +825,108 @@ static void core_memory_tests_data() { QTest::newRow("cache_insert_sort") << code << regs_init << regs_res << mem_init << mem_res; } + // lwr, lwl, swr, swl + { + QVector<uint32_t> code{ + // __start: + 0x3c1c8003, // lui gp,0x8003 + 0x279c90d0, // addiu gp,gp,-28464 + // main: + 0x3c1aaabb, // lui k0,0xaabb + 0x375accdd, // ori k0,k0,0xccdd + 0x23420000, // addi v0,k0,0 + 0x23430000, // addi v1,k0,0 + 0x23440000, // addi a0,k0,0 + 0x23450000, // addi a1,k0,0 + 0x23460000, // addi a2,k0,0 + 0x23470000, // addi a3,k0,0 + 0x23480000, // addi t0,k0,0 + 0x23490000, // addi t1,k0,0 + 0x234a0000, // addi t2,k0,0 + 0x3c1b8002, // lui k1,0x8002 + 0x277b0100, // addiu k1,k1,0x100 + 0x9b620000, // lwr v0,0(k1) + 0x9b630001, // lwr v1,1(k1) + 0x9b640002, // lwr a0,2(k1) + 0x9b650003, // lwr a1,3(k1) + 0x8b660000, // lwl a2,0(k1) + 0x8b670001, // lwl a3,1(k1) + 0x8b680002, // lwl t0,2(k1) + 0x8b690003, // lwl t1,3(k1) + 0xbb7a0000, // swr k0,0(k1) + 0xbb7a0005, // swr k0,5(k1) + 0xbb7a000a, // swr k0,10(k1) + 0xbb7a000f, // swr k0,15(k1) + 0xab7a0014, // swl k0,20(k1) + 0xab7a0019, // swl k0,25(k1) + 0xab7a001e, // swl k0,30(k1) + 0xab7a0023, // swl k0,35(k1) + 0x8f6a0000, // lw t2,0(k1) + 0x8f6b0004, // lw t3,4(k1) + 0x8f6c0008, // lw t4,8(k1) + 0x8f6d000c, // lw t5,12(k1) + 0x8f6e0010, // lw t6,16(k1) + 0x8f6f0014, // lw t7,20(k1) + 0x8f700018, // lw s0,24(k1) + 0x8f71001c, // lw s1,28(k1) + 0x8f720020, // lw s2,32(k1) + 0x8f730020, // lw s3,32(k1) + 0xbd090000, // cache 0x9,0(t0) + // loop: + 0x1000ffff, // b 800200a4 <loop> + 0x00000000, // nop + // mem: + }; + Registers regs_init; + regs_init.pc_abs_jmp(0x80020000); + Registers regs_res(regs_init); + + regs_res.write_gp(2, 0xaabbcc01); + regs_res.write_gp(3, 0xaabb0102); + regs_res.write_gp(4, 0xaa010203); + regs_res.write_gp(5, 0x01020304); + regs_res.write_gp(6, 0x01020304); + regs_res.write_gp(7, 0x020304dd); + regs_res.write_gp(8, 0x0304ccdd); + regs_res.write_gp(9, 0x04bbccdd); + regs_res.write_gp(10, 0xdd020304); + regs_res.write_gp(11, 0xccdd0708); + regs_res.write_gp(12, 0xbbccdd0c); + regs_res.write_gp(13, 0xaabbccdd); + regs_res.write_gp(14, 0x11121314); + regs_res.write_gp(15, 0xaabbccdd); + regs_res.write_gp(16, 0x19aabbcc); + regs_res.write_gp(17, 0x1d1eaabb); + regs_res.write_gp(18, 0x212223aa); + regs_res.write_gp(19, 0x212223aa); + + regs_res.write_gp(26, 0xaabbccdd); + regs_res.write_gp(27, 0x80020100); + regs_res.write_gp(28, 0x800290d0); + + std::uint32_t addr; + Memory mem_init; + addr = 0x80020100; + QVector<uint32_t> data_init{0x01020304, 0x05060708, 0x090a0b0c, 0x0d0e0f00, + 0x11121314, 0x15161718, 0x191a1b1c, 0x1d1e1f10, + 0x21222324, 0x25262728, 0x292a2b2c, 0x2d2e2f20}; + foreach (uint32_t i, data_init) { + mem_init.write_word(addr, i); + addr += 4; + } + Memory mem_res; + addr = 0x80020100; + QVector<uint32_t> data_res{0xdd020304, 0xccdd0708, 0xbbccdd0c, 0xaabbccdd, + 0x11121314, 0xaabbccdd, 0x19aabbcc, 0x1d1eaabb, + 0x212223aa, 0x25262728, 0x292a2b2c, 0x2d2e2f20}; + foreach (uint32_t i, data_res) { + mem_res.write_word(addr, i); + addr += 4; + } + + regs_res.pc_abs_jmp(regs_init.read_pc() + 4 * code.length() - 4); + QTest::newRow("lwr_lrl_swr_swl") << code << regs_init << regs_res << mem_init << mem_res; + } } void MachineTests::singlecore_memory_tests_data() { |