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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-14 00:20:03 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-14 00:20:03 +0100
commit8dca954e854386ea9ab81da328d515b48b04affe (patch)
tree65d1769e81407bffb22d926cddaba55a1b73b424
parent3d16006e6b490ab5c29e05a82226d0f5739b773e (diff)
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Implement MUL operation which stores result to the register.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
-rw-r--r--qtmips_machine/alu.cpp2
-rw-r--r--qtmips_machine/instruction.cpp73
-rw-r--r--qtmips_machine/machinedefs.h1
3 files changed, 74 insertions, 2 deletions
diff --git a/qtmips_machine/alu.cpp b/qtmips_machine/alu.cpp
index ad0e3c9..f0e45a5 100644
--- a/qtmips_machine/alu.cpp
+++ b/qtmips_machine/alu.cpp
@@ -126,6 +126,8 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u
return ((std::int32_t)s < (std::int32_t)t) ? 1 : 0;
case ALU_OP_SLTU:
return (s < t) ? 1 : 0;
+ case ALU_OP_MUL:
+ return (std::uint32_t)((std::int32_t)s * (std::int32_t)t);
case ALU_OP_LUI:
return t << 16;
case ALU_OP_BSHFL:
diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp
index 90a6ca1..21eaacb 100644
--- a/qtmips_machine/instruction.cpp
+++ b/qtmips_machine/instruction.cpp
@@ -163,6 +163,74 @@ static const struct InstructionMap alu_instruction_map[] = {
.flags = FLAGS_ALU_T_R_STD},
};
+static const struct InstructionMap special2_instruction_map[] = {
+ IM_UNKNOWN, // 0
+ IM_UNKNOWN, // 1
+ {"MUL", IT_R, ALU_OP_MUL, NOMEM, nullptr,
+ .flags = FLAGS_ALU_T_R_STD}, // 32
+ IM_UNKNOWN, // 3
+ IM_UNKNOWN, // 4
+ IM_UNKNOWN, // 5
+ IM_UNKNOWN, // 6
+ IM_UNKNOWN, // 7
+ IM_UNKNOWN, // 8
+ IM_UNKNOWN, // 9
+ IM_UNKNOWN, // 10
+ IM_UNKNOWN, // 11
+ IM_UNKNOWN, // 12
+ IM_UNKNOWN, // 13
+ IM_UNKNOWN, // 14
+ IM_UNKNOWN, // 15
+ IM_UNKNOWN, // 16
+ IM_UNKNOWN, // 17
+ IM_UNKNOWN, // 18
+ IM_UNKNOWN, // 19
+ IM_UNKNOWN, // 20
+ IM_UNKNOWN, // 21
+ IM_UNKNOWN, // 22
+ IM_UNKNOWN, // 23
+ IM_UNKNOWN, // 24
+ IM_UNKNOWN, // 25
+ IM_UNKNOWN, // 26
+ IM_UNKNOWN, // 27
+ IM_UNKNOWN, // 28
+ IM_UNKNOWN, // 29
+ IM_UNKNOWN, // 30
+ IM_UNKNOWN, // 31
+ IM_UNKNOWN, // 32
+ IM_UNKNOWN, // 33
+ IM_UNKNOWN, // 34
+ IM_UNKNOWN, // 35
+ IM_UNKNOWN, // 36
+ IM_UNKNOWN, // 37
+ IM_UNKNOWN, // 38
+ IM_UNKNOWN, // 39
+ IM_UNKNOWN, // 40
+ IM_UNKNOWN, // 41
+ IM_UNKNOWN, // 42
+ IM_UNKNOWN, // 43
+ IM_UNKNOWN, // 44
+ IM_UNKNOWN, // 45
+ IM_UNKNOWN, // 46
+ IM_UNKNOWN, // 47
+ IM_UNKNOWN, // 48
+ IM_UNKNOWN, // 49
+ IM_UNKNOWN, // 50
+ IM_UNKNOWN, // 51
+ IM_UNKNOWN, // 52
+ IM_UNKNOWN, // 53
+ IM_UNKNOWN, // 54
+ IM_UNKNOWN, // 55
+ IM_UNKNOWN, // 56
+ IM_UNKNOWN, // 57
+ IM_UNKNOWN, // 58
+ IM_UNKNOWN, // 59
+ IM_UNKNOWN, // 60
+ IM_UNKNOWN, // 61
+ IM_UNKNOWN, // 62
+ IM_UNKNOWN, // 63
+};
+
static const struct InstructionMap special3_instruction_map[] = {
IM_UNKNOWN, // 0
IM_UNKNOWN, // 1
@@ -224,7 +292,7 @@ static const struct InstructionMap special3_instruction_map[] = {
IM_UNKNOWN, // 56
IM_UNKNOWN, // 57
IM_UNKNOWN, // 58
- {"RDHWR", IT_R, ALU_OP_NOP, NOMEM, nullptr,
+ {"RDHWR", IT_R, ALU_OP_RDHWR, NOMEM, nullptr,
.flags = IMF_SUPPORTED | IMF_REGWRITE},
IM_UNKNOWN, // 60
IM_UNKNOWN, // 61
@@ -334,7 +402,8 @@ static const struct InstructionMap instruction_map[] = {
IM_UNKNOWN, // 25
IM_UNKNOWN, // 26
IM_UNKNOWN, // 27
- IM_UNKNOWN, // 28
+ {"REGIMM", IT_I, NOALU, NOMEM, special2_instruction_map, // SPECIAL2
+ .flags = IMF_SUB_ENCODE(6, 0)},
IM_UNKNOWN, // 29
IM_UNKNOWN, // 30
{"SPECIAL3", IT_R, NOALU, NOMEM, special3_instruction_map, //
diff --git a/qtmips_machine/machinedefs.h b/qtmips_machine/machinedefs.h
index 258b76c..ef9ec0d 100644
--- a/qtmips_machine/machinedefs.h
+++ b/qtmips_machine/machinedefs.h
@@ -87,6 +87,7 @@ enum AluOp : std::uint8_t {
ALU_OP_NOR,
ALU_OP_SLT,
ALU_OP_SLTU,
+ ALU_OP_MUL,
ALU_OP_LUI,
ALU_OP_BSHFL,
ALU_OP_PASS_T, // Pass t argument without change for JAL