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* Added test for LWR, LWL, SWR and SWL instructions.Pavel Pisa2019-02-21
| | | | | | | The reference data has been obtained by running application under userspace MIPS QEMU. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Distinguish between write-through cache with allocate and update only if hit.Pavel Pisa2019-02-20
| | | | | | | Add into cache statistic number of backing/main memory accesses. Correction of meaning and computation of the cache statistic. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Update project files to adapt for release and debug libraries location for ↵Pavel Pisa2019-02-19
| | | | | | Windows builds. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Pass arithmetic exception trough pipeline and implement trap support and ↵Pavel Pisa2019-02-17
| | | | | | instructions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implement EXT instruction used in GLIBC startup.Pavel Pisa2019-02-15
| | | | | | It requires one more field to pass to ALU. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add ELF library even to the final executables linking to allow build with ↵Pavel Pisa2019-02-12
| | | | | | static machine lib. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct build for LLVM.Fanda Vacek2019-02-09
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* Include test for BGEZ, BGTZ, BLEZ, BLTZ, BEQ and BNE.Pavel Pisa2019-02-05
| | | | | | | This complex test check for correct behavior for -1, 0 and 1 values. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct shift operation and make ALU_OP_MOVZ and ALU_OP_MOVN encoding ↵Pavel Pisa2019-02-05
| | | | | | independent. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Unified instructions table and access type move to machinedefs.h .Pavel Pisa2019-02-04
| | | | | | | This allows to specify requirement for RS and RD on instruction basis even for T_R / ALU instructions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include more complex insert-sort test which checks memory and cache.Pavel Pisa2019-02-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Simplify core test by use of common function to run test machine.Pavel Pisa2019-02-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add license to the source files.Pavel Pisa2019-02-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implement instructions MULT, MULTU, DIV, DIVU.Pavel Pisa2019-02-03
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Include test for jump and link processing.Pavel Pisa2019-02-02
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add test for forwarding in ALU operations.Pavel Pisa2019-02-02
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct ALU test for SUB exception.Pavel Pisa2019-02-02
| | | | | | | | | | | | The operation 3 - 4 = 1 is legal integer arithmetic operation. Changed to 0x80000003 - 4 = 0x7fffffff 2147483651 - 4 = 2147483647 which overflows. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implement LUIKarel Kočí2018-04-08
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* Integrate cache with rest of the machine coreKarel Kočí2018-04-08
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* Add initial implementatio of cachesKarel Kočí2018-04-07
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* Use whole words in memoryKarel Kočí2018-04-05
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* Fix signextend in coreKarel Kočí2018-02-14
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* Cleanup some todos in codeKarel Kočí2018-01-15
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* Fix program loader testKarel Kočí2018-01-15
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* Fix SRA and SRAV instructionsKarel Kočí2018-01-15
| | | | | | This implementation is correct one but there is no guarantee that it will work with all compilers so we should always check on given platform that tests pass (and potentially fix it).
* Allow delay slot disable for non-pipelined coreKarel Kočí2018-01-03
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* Remove some obsolete filesKarel Kočí2018-01-01
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* Put qtmips_machine to machine namespaceKarel Kočí2017-12-17
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* Fix test for JRKarel Kočí2017-12-12
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* Implement some store and load instructionsKarel Kočí2017-12-12
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* Implement branch and jump instructionsKarel Kočí2017-12-12
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* Add crude implementation of MOV* instructionsKarel Kočí2017-11-25
| | | | I don't like how it's implemented but I have no other idea atm.
* Implement instructions for moving from and to HI and LO registersKarel Kočí2017-11-25
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* Fix SLTU instructionKarel Kočí2017-11-25
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* Test pipelined coreKarel Kočí2017-11-25
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* Implement some logical operationsKarel Kočí2017-11-21
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* Implement some immediate arithmetic instructionsKarel Kočí2017-11-21
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* Implement tests for few more arithmetic instructionsKarel Kočí2017-11-21
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* Implement and test ADDKarel Kočí2017-11-21
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* Add possibility to compare memory and registers stateKarel Kočí2017-11-21
| | | | | | For core testing we want to compare whole memory and registers. Registers are pretty simple but in case of memory it is some what more complicated and required its own tests to be sure that it works.
* Another huge pile of work for about two monthsKarel Kočí2017-11-19
| | | | | | Well I should commit every change instead of this madness. I am not documenting changes as all this is just improvements and implementation progression.
* Just something I had staggedKarel Kočí2017-11-19
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* Add some more instructions to be decoded and arithmetic I testKarel Kočí2017-09-05
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* Use QString and QVector instead of std ones and moreKarel Kočí2017-09-02
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* Handle endianness in memory correctlyKarel Kočí2017-08-31
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* Initial commitKarel Kočí2017-08-30
Adding work done so far.
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