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qtmips
fix-memory-view
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simple-memory-view
MIPS CPU emulator for education purposes
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qtmips_machine
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tests
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testcore.cpp
Commit message (
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Author
Age
*
Added test for LWR, LWL, SWR and SWL instructions.
Pavel Pisa
2019-02-21
*
Distinguish between write-through cache with allocate and update only if hit.
Pavel Pisa
2019-02-20
*
Include test for BGEZ, BGTZ, BLEZ, BLTZ, BEQ and BNE.
Pavel Pisa
2019-02-05
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Include more complex insert-sort test which checks memory and cache.
Pavel Pisa
2019-02-04
*
Simplify core test by use of common function to run test machine.
Pavel Pisa
2019-02-04
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Add license to the source files.
Pavel Pisa
2019-02-04
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Implement instructions MULT, MULTU, DIV, DIVU.
Pavel Pisa
2019-02-03
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Include test for jump and link processing.
Pavel Pisa
2019-02-02
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Add test for forwarding in ALU operations.
Pavel Pisa
2019-02-02
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Implement LUI
Karel Kočí
2018-04-08
*
Integrate cache with rest of the machine core
Karel Kočí
2018-04-08
*
Fix signextend in core
Karel Kočí
2018-02-14
*
Fix SRA and SRAV instructions
Karel Kočí
2018-01-15
*
Allow delay slot disable for non-pipelined core
Karel Kočí
2018-01-03
*
Put qtmips_machine to machine namespace
Karel Kočí
2017-12-17
*
Fix test for JR
Karel Kočí
2017-12-12
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Implement some store and load instructions
Karel Kočí
2017-12-12
*
Implement branch and jump instructions
Karel Kočí
2017-12-12
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Add crude implementation of MOV* instructions
Karel Kočí
2017-11-25
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Implement instructions for moving from and to HI and LO registers
Karel Kočí
2017-11-25
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Test pipelined core
Karel Kočí
2017-11-25
*
Implement some logical operations
Karel Kočí
2017-11-21
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Implement some immediate arithmetic instructions
Karel Kočí
2017-11-21
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Implement tests for few more arithmetic instructions
Karel Kočí
2017-11-21
*
Implement and test ADD
Karel Kočí
2017-11-21
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Add possibility to compare memory and registers state
Karel Kočí
2017-11-21
*
Another huge pile of work for about two months
Karel Kočí
2017-11-19
*
Just something I had stagged
Karel Kočí
2017-11-19