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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-04 19:05:40 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-04 19:05:40 +0100 |
commit | d3363c3430029eba44464469176b3b27bb12089a (patch) | |
tree | 9987ae6daae04cb6f5a3a74bc2d04ea5b5a3887e /qtmips_machine/instruction.h | |
parent | a107902ca07e69413437fd2e66495a91b4b6fb18 (diff) | |
download | qtmips-d3363c3430029eba44464469176b3b27bb12089a.tar.gz qtmips-d3363c3430029eba44464469176b3b27bb12089a.tar.bz2 qtmips-d3363c3430029eba44464469176b3b27bb12089a.zip |
Remove almost all direct access to opcode and function from the core.
Remaining are MOVZ and MOVN in the execution phase
and all branch and jump operations in handle_pc().
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/instruction.h')
-rw-r--r-- | qtmips_machine/instruction.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/qtmips_machine/instruction.h b/qtmips_machine/instruction.h index 8286679..c19a205 100644 --- a/qtmips_machine/instruction.h +++ b/qtmips_machine/instruction.h @@ -44,6 +44,7 @@ namespace machine { enum InstructionFlags { + IMF_NONE = 0, IMF_SUPPORTED = 1L<<0, IMF_MEMWRITE = 1L<<1, IMF_MEMREAD = 1L<<2, @@ -61,6 +62,7 @@ enum InstructionFlags { IMF_ALU_REQ_RT = 1L<<14, IMF_READ_HILO = 1L<<15, IMF_WRITE_HILO = 1L<<16, + IMF_PC8_TO_RT = 1L<<17, }; class Instruction { @@ -93,7 +95,6 @@ public: enum AluOp alu_op() const; enum AccessControl mem_ctl() const; - bool is_store() const; // Store instructions requires some additional handling so identify them bool is_break() const; bool operator==(const Instruction &c) const; |