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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-08 13:52:59 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-08 13:52:59 +0100 |
commit | 789186fd63fb3fb63af1d8875cbe43609321b9d8 (patch) | |
tree | af800264aeb46dc839b4d209833420f9de4f632b /qtmips_machine/core.cpp | |
parent | 6b639c50c93e4a682b15dcdf20f3d46a47d68a64 (diff) | |
download | qtmips-789186fd63fb3fb63af1d8875cbe43609321b9d8.tar.gz qtmips-789186fd63fb3fb63af1d8875cbe43609321b9d8.tar.bz2 qtmips-789186fd63fb3fb63af1d8875cbe43609321b9d8.zip |
Implement LL and SC as simple load and store word. SC returns 1 unconditionally.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/core.cpp')
-rw-r--r-- | qtmips_machine/core.cpp | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 4164db0..2d33309 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -264,10 +264,19 @@ struct Core::dtMemory Core::memory(const struct dtExecute &dt) { } else { if (dt.memctl == AC_CACHE_OP) mem_data->sync(); - else if (memwrite) - mem_data->write_ctl(dt.memctl, mem_addr, dt.val_rt); - else if (memread) - towrite_val = mem_data->read_ctl(dt.memctl, mem_addr); + else if (memwrite) { + if (dt.memctl == AC_STORE_CONDITIONAL) { + mem_data->write_ctl(AC_WORD, mem_addr, dt.val_rt); + towrite_val = 1; + } else { + mem_data->write_ctl(dt.memctl, mem_addr, dt.val_rt); + } + } else if (memread) { + if (dt.memctl == AC_LOAD_LINKED) + towrite_val = mem_data->read_ctl(AC_WORD, mem_addr); + else + towrite_val = mem_data->read_ctl(dt.memctl, mem_addr); + } } emit memory_alu_value(dt.alu_val); |