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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-03-04 22:38:34 +0100 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-03-04 22:38:34 +0100 |
| commit | 73886d9d1733368fe3c876c8e613ba5821e12944 (patch) | |
| tree | 98dfefd703835f773b5adf72d9cd1f2e2cd1fe04 /qtmips_machine/core.cpp | |
| parent | 1dc09ab41ae703a1f15be87cacab5e842cf1a09d (diff) | |
| download | qtmips-73886d9d1733368fe3c876c8e613ba5821e12944.tar.gz qtmips-73886d9d1733368fe3c876c8e613ba5821e12944.tar.bz2 qtmips-73886d9d1733368fe3c876c8e613ba5821e12944.zip | |
Use irq 3 (HW1) for Rx and irq 2 (HW0) for Tx to be compatible with SPIM.
Jump to address 0x8000180 by default and to EBase + 0x180
when EBase is set to be compatible with real MIPS CPU.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/core.cpp')
| -rw-r--r-- | qtmips_machine/core.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 22dfdc8..351ffb0 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -141,7 +141,7 @@ bool Core::handle_exception(Core *core, Registers *regs, ExceptionCause excause, if (cop0state->read_cop0reg(Cop0State::EBase) != 0) { if (excause == EXCAUSE_INT) { cop0state->set_status_exl(true); - regs->pc_abs_jmp(cop0state->read_cop0reg(Cop0State::EBase)); + regs->pc_abs_jmp(cop0state->exception_pc_address()); } } } |