1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
|
// SPDX-License-Identifier: GPL-2.0+
/*******************************************************************************
* QtMips - MIPS 32-bit Architecture Subset Simulator
*
* Implemented to support following courses:
*
* B35APO - Computer Architectures
* https://cw.fel.cvut.cz/wiki/courses/b35apo
*
* B4M35PAP - Advanced Computer Architectures
* https://cw.fel.cvut.cz/wiki/courses/b4m35pap/start
*
* Copyright (c) 2017-2019 Karel Koci<cynerd@email.cz>
* Copyright (c) 2019 Pavel Pisa <pisa@cmp.felk.cvut.cz>
*
* Faculty of Electrical Engineering (http://www.fel.cvut.cz)
* Czech Technical University (http://www.cvut.cz/)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*
******************************************************************************/
#include "serialport.h"
#define SERP_RX_ST_REG_o 0x00
#define SERP_RX_ST_REG_READY_m 0x1
#define SERP_RX_ST_REG_IE_m 0x2
#define SERP_RX_DATA_REG_o 0x04
#define SERP_TX_ST_REG_o 0x08
#define SERP_TX_ST_REG_READY_m 0x1
#define SERP_TX_ST_REG_IE_m 0x2
#define SERP_TX_DATA_REG_o 0x0c
using namespace machine;
SerialPort::SerialPort() {
rx_st_reg = 0;
rx_data_reg = 0;
tx_st_reg = 0;
tx_irq_level = 2; // HW Interrupt 0
rx_irq_level = 3; // HW Interrupt 1
tx_irq_active = false;
rx_irq_active = false;
}
SerialPort::~SerialPort() {
}
void SerialPort::pool_rx_byte() const {
unsigned int byte = 0;
bool available = false;
if (!(rx_st_reg & SERP_RX_ST_REG_READY_m)) {
rx_st_reg |= SERP_RX_ST_REG_READY_m;
emit rx_byte_pool(0, byte, available);
if (available)
rx_data_reg = byte;
else
rx_st_reg &= ~SERP_RX_ST_REG_READY_m;
}
}
bool SerialPort::wword(std::uint32_t address, std::uint32_t value) {
#if 0
printf("SerialPort::wword address 0x%08lx data 0x%08lx\n",
(unsigned long)address, (unsigned long)value);
#endif
emit write_notification(address, value);
switch (address) {
case SERP_RX_ST_REG_o:
rx_st_reg &= ~SERP_RX_ST_REG_IE_m;
rx_st_reg |= value & SERP_RX_ST_REG_IE_m;
rx_queue_check();
update_rx_irq();
break;
case SERP_TX_ST_REG_o:
tx_st_reg &= ~SERP_TX_ST_REG_IE_m;
tx_st_reg |= value & SERP_TX_ST_REG_IE_m;
update_tx_irq();
break;
case SERP_TX_DATA_REG_o:
emit tx_byte(value & 0xff);
update_tx_irq();
break;
}
return true;
}
std::uint32_t SerialPort::rword(std::uint32_t address, bool debug_access) const {
(void)debug_access;
std::uint32_t value = 0x00000000;
#if 0
printf("SerialPort::rword address 0x%08lx\n",
(unsigned long)address);
#endif
switch (address) {
case SERP_RX_ST_REG_o:
pool_rx_byte();
value = rx_st_reg;
break;
case SERP_RX_DATA_REG_o:
pool_rx_byte();
if (rx_st_reg & SERP_RX_ST_REG_READY_m) {
value = rx_data_reg;
rx_st_reg &= ~SERP_RX_ST_REG_READY_m;
update_rx_irq();
} else {
value = 0;
}
rx_queue_check();
break;
case SERP_TX_ST_REG_o:
value = tx_st_reg | SERP_TX_ST_REG_READY_m;
break;
}
emit read_notification(address, &value);
return value;
}
void SerialPort::update_rx_irq() const {
bool active = !!(rx_st_reg & SERP_RX_ST_REG_IE_m);
active &= !!(rx_st_reg & SERP_RX_ST_REG_READY_m);
if (active != rx_irq_active) {
rx_irq_active = active;
emit signal_interrupt(rx_irq_level, active);
}
}
void SerialPort::update_tx_irq() const {
bool active = !!(tx_st_reg & SERP_TX_ST_REG_IE_m);
active &= !!(tx_st_reg & SERP_TX_ST_REG_READY_m);
if (active != tx_irq_active) {
tx_irq_active = active;
emit signal_interrupt(tx_irq_level, active);
}
}
void SerialPort::rx_queue_check() const {
if (rx_st_reg & SERP_RX_ST_REG_IE_m)
pool_rx_byte();
update_rx_irq();
}
|
