aboutsummaryrefslogtreecommitdiff
path: root/qtmips_machine/instruction.cpp
blob: c34ff3a2d697cc88c2342c3ce78fdeba4539430f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
#include "instruction.h"
#include "qtmipsexception.h"

using namespace machine;
Instruction::Instruction() {
    this->dt = 0;
}

Instruction::Instruction(std::uint32_t inst) {
    this->dt = inst;
}

Instruction::Instruction(std::uint8_t opcode, std::uint8_t rs, std::uint8_t rt, std::uint8_t rd, std::uint8_t shamt, std::uint8_t funct) {
    this->dt = 0;
    this->dt |= opcode << 26;
    this->dt |= rs << 21;
    this->dt |= rt << 16;
    this->dt |= rd << 11;
    this->dt |= shamt << 6;
    this->dt |= funct;
}

Instruction::Instruction(std::uint8_t opcode, std::uint8_t rs, std::uint8_t rt, std::uint16_t immediate) {
    this->dt = 0;
    this->dt |= opcode << 26;
    this->dt |= rs << 21;
    this->dt |= rt << 16;
    this->dt |= immediate;
}

Instruction::Instruction(std::uint8_t opcode, std::uint32_t address) {
    this->dt = 0;
    this->dt |= opcode << 26;
    this->dt |= address;
}

Instruction::Instruction(const Instruction &i) {
    this->dt = i.data();
}

#define MASK(LEN,OFF) ((this->dt >> (OFF)) & ((1 << (LEN)) - 1))

std::uint8_t Instruction::opcode() const {
    return (std::uint8_t) MASK(6, 26);
}

std::uint8_t Instruction::rs() const {
    return (std::uint8_t) MASK(5, 21);
}

std::uint8_t Instruction::rt() const {
    return (std::uint8_t) MASK(5, 16);
}

std::uint8_t Instruction::rd() const {
    return (std::uint8_t) MASK(5, 11);
}

std::uint8_t Instruction::shamt() const {
    return (std::uint8_t) MASK(5, 6);

}

std::uint8_t Instruction::funct() const {
    return (std::uint8_t) MASK(6, 0);
}

std::uint16_t Instruction::immediate() const {
    return (std::uint16_t) MASK(16, 0);
}

std::uint32_t Instruction::address() const {
    return (std::uint32_t) MASK(26, 0);
}

std::uint32_t Instruction::data() const {
    return this->dt;
}

bool Instruction::operator==(const Instruction &c) const {
    return (this->data() == c.data());
}

bool Instruction::operator!=(const Instruction &c) const {
    return ! this->operator==(c);
}

Instruction &Instruction::operator=(const Instruction &c) {
    if (this != &c)
        this->dt = c.data();
    return *this;
}


enum InstructionType {
    IT_R,
    IT_I,
    IT_J
};

struct InstructionMap {
    const char *name;
    enum InstructionType type;
};

#define IM_UNKNOWN {"UNKNOWN", IT_R}
// This table is indexed by opcode
static const struct InstructionMap instruction_map[] = {
    {"ALU", IT_R}, // Alu operations
    {"REGIMM", IT_I}, // REGIMM (BLTZ, BGEZ)
    {"J", IT_J},
    {"JAL", IT_J},
    {"BEQ", IT_I},
    {"BNE", IT_I},
    {"BLEZ", IT_I},
    {"BGTZ", IT_I},
    {"ADDI", IT_I},
    {"ADDIU", IT_I},
    {"SLTI", IT_I},
    {"SLTIU", IT_I},
    {"ANDI", IT_I},
    {"ORI", IT_I},
    {"XORI", IT_I},
    {"LUI", IT_I},
    IM_UNKNOWN, // 16
    IM_UNKNOWN, // 17
    IM_UNKNOWN, // 18
    IM_UNKNOWN, // 19
    IM_UNKNOWN, // 20
    IM_UNKNOWN, // 21
    IM_UNKNOWN, // 22
    IM_UNKNOWN, // 23
    IM_UNKNOWN, // 24
    IM_UNKNOWN, // 25
    IM_UNKNOWN, // 26
    IM_UNKNOWN, // 27
    IM_UNKNOWN, // 28
    IM_UNKNOWN, // 29
    IM_UNKNOWN, // 30
    IM_UNKNOWN, // 31
    {"LB", IT_I},
    {"LH", IT_I},
    {"LWL", IT_I},
    {"LW", IT_I},
    {"LBU", IT_I},
    {"LHU", IT_I},
    {"LWR", IT_I},
    IM_UNKNOWN, // 39
    {"SB", IT_I},
    {"SH", IT_I},
    {"SWL", IT_I},
    {"SW", IT_I},
    IM_UNKNOWN, // 44
    IM_UNKNOWN, // 45
    {"SWR", IT_I},
    IM_UNKNOWN, // 47
    IM_UNKNOWN, // 48
    IM_UNKNOWN, // 49
    IM_UNKNOWN, // 50
    IM_UNKNOWN, // 51
    IM_UNKNOWN, // 52
    IM_UNKNOWN, // 53
    IM_UNKNOWN, // 54
    IM_UNKNOWN, // 55
    IM_UNKNOWN, // 56
    IM_UNKNOWN, // 57
    IM_UNKNOWN, // 58
    IM_UNKNOWN, // 59
    IM_UNKNOWN, // 60
    IM_UNKNOWN, // 61
    IM_UNKNOWN, // 61
    IM_UNKNOWN, // 62
    IM_UNKNOWN // 63
};
#undef IM_UNKNOWN

struct AluInstructionMap {
    const char *name;
};

#define AIM_UNKNOWN {"UNKNOWN"}
// This table is indexed by funct
static const struct AluInstructionMap alu_instruction_map[] = {
    {"SLL"},
    AIM_UNKNOWN,
    {"SRL"},
    {"SRA"},
    {"SLLV"},
    AIM_UNKNOWN,
    {"SRLV"},
    {"SRAV"},
    {"JR"},
    {"JALR"},
    {"MOVZ"},
    {"MOVN"},
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    {"MFHU"},
    {"MTHI"},
    {"MFLO"},
    {"MTLO"},
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    {"ADD"},
    {"ADDU"},
    {"SUB"},
    {"SUBU"},
    {"AND"},
    {"OR"},
    {"XOR"},
    {"NOR"},
    AIM_UNKNOWN,
    AIM_UNKNOWN,
    {"SLT"},
    {"SLTU"}
};
#undef AIM_UNKNOWN

QString Instruction::to_str() const {
    // TODO there are exception where some fields are zero and such so we should not print them in such case
    if  (opcode() >= (sizeof(instruction_map) / sizeof(struct InstructionMap)))
        return QString("UNKNOWN");
    if (dt == 0)
        return QString("NOP");
    const struct InstructionMap &im = instruction_map[opcode()];
    QString res;
    switch (im.type) {
    case IT_I:
        res += im.name;
        res += " $" + QString::number(rs()) + ", $" + QString::number(rt()) + ", 0x" + QString::number(immediate(), 16);
        break;
    case IT_J:
        res += im.name;
        // TODO we need to know instruction address to expand address section by it
        res += " " + QString::number(address(), 16);
        break;
    case IT_R:
        {
        // Note that all R instructions we support has opcode == 0 and so they are processed by alu table
        if (funct() >= (sizeof(alu_instruction_map) / sizeof(struct AluInstructionMap)))
            return QString("UNKNOWN");
        const struct AluInstructionMap &am = alu_instruction_map[funct()];
        res += am.name;
        res += " $" + QString::number(rs()) + ", $" + QString::number(rt()) + ", $" + QString::number(rd());
        break;
        }
    }
    return res;
}