qtmips - MIPS CPU emulator for education purposes

	Commit message (Collapse)	Author	Age
*	Dock to view coprocessor 0 and cop0 counter/comparator support.	Pavel Pisa	2019-03-05
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Implemented interrupt delivery and processing for serial port.	Pavel Pisa	2019-03-04
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Implemented coprocessor 0 registers access and register EPC and Cause set by ↵	Pavel Pisa	2019-03-04
\| \| \| \| \| \|	exception. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Exceptions causes align with SPIM and add serial port range alias equivalent ↵	Pavel Pisa	2019-02-25
\| \| \| \| \| \|	to SPIM. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Add support for goto to selected symbol address.	Pavel Pisa	2019-02-22
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Add burst time and store timing in the config.	Pavel Pisa	2019-02-21
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Ensure that single step does not run chunk of instructions instead of one.	Pavel Pisa	2019-02-13
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Implemented three dials equivalent to MZ_APO RGB dials.	Pavel Pisa	2019-02-13
\| \| \| \| \| \| \|	Tested with code compiled by Linux PIC based GCC compiler with calling musl-libc sprintf function. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Include simple serial port terminal and prepare empty peripheral dock.	Pavel Pisa	2019-02-13
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Add speed option to run core for time chunks without visualization.	Pavel Pisa	2019-02-13
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Make memory and program listing editable.	Pavel Pisa	2019-02-12
\| \| \| \| \| \|	Instruction parsing is rough and does not support branch offset computation. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Display red background for instruction causing exception and skip HW ↵	Pavel Pisa	2019-02-11
\| \| \| \| \| \| \| \| \| \|	breakpoint for first cycle after resume. Instruction for stage is updated when given stage is flushed as well. But other signals are left intact, it is duty of memory stage to discard effect of instruction causing interrupt. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Basic "hardware" breakpoints support implemented.	Pavel Pisa	2019-02-11
\| \| \| \| \| \| \| \| \| \|	It works like real inserted breakpoint on hardware. Breakpoint has to be removed to allow code continue because else instruction is refetch and breakpoint triggers again. The single step function should resolve temporal masking of the breakpoint. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Prepare core for "hardware" breakpoints support and add signals to follow ↵	Pavel Pisa	2019-02-11
\| \| \| \| \| \|	stages. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Make function to register exception handler accessible from outside.	Pavel Pisa	2019-02-08
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Provide at least partial cleanup after QtMipsMachine.	Pavel Pisa	2019-02-06
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Implement simple address-space ranges registration and example peripheral.	Pavel Pisa	2019-02-06
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Setup initial PC according executable entry form ELF file if it is non zero.	Pavel Pisa	2019-02-04
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Add license to the source files.	Pavel Pisa	2019-02-04
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Correct memory view updates for uncached and write-through case.	Pavel Pisa	2019-02-03
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Implement BREAK instruction to stop continuous execution.	Pavel Pisa	2019-02-03
\| \| \| \|	Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
*	Add cache statistics	Karel Kočí	2018-05-23
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*	Integrate cache with rest of the machine core	Karel Kočí	2018-04-08
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*	Fix Pipelined core not to accept hazard unit configuration	Karel Kočí	2018-01-17
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*	Cleanup some todos in code	Karel Kočí	2018-01-15
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*	Change how we configure cache and configure hazard unit	Karel Kočí	2018-01-15
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*	Add ability to get specific core type from qtmipsmachine	Karel Kočí	2018-01-08
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*	Implement machine restart	Karel Kočí	2018-01-05
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*	Copy machineconfig in QtMipsMachine	Karel Kočí	2018-01-05
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*	Implement some machine execution speed control for gui	Karel Kočí	2018-01-04
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*	Allow delay slot disable for non-pipelined core	Karel Kočí	2018-01-03
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*	Fix how we pass exception	Karel Kočí	2018-01-01
\| \| \| \| \| \|	Previous implementation reseted caught exception to type QtMipsException so we lost possibility to check for object type later on.
*	A lot of small changes in gui	Karel Kočí	2017-12-21
\| \| \| \| \| \|	Added machine status. Widgets now hold size and registers dock has now scrollbars. And more...
*	Put qtmips_machine to machine namespace	Karel Kočí	2017-12-17
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*	Implement few initial graphic elements	Karel Kočí	2017-12-15
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*	Another but same fix for cache	Karel Kočí	2017-12-11
\| \| \| \|	Segfault happening had same cause as previous problem so fix is similar.
*	Another huge pile of work for about two months	Karel Kočí	2017-11-19
\| \| \| \| \| \|	Well I should commit every change instead of this madness. I am not documenting changes as all this is just improvements and implementation progression.
*	Initial commit	Karel Kočí	2017-08-30
	Adding work done so far.