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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-06 14:42:49 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-06 14:42:49 +0100 |
commit | 608eed5c16366cae251f5d12ad1ed0b988b3ce46 (patch) | |
tree | bc338c8bee507c2a29b215b3c5f172c86f790933 /qtmips_machine/qtmipsmachine.cpp | |
parent | c27a1e6354c04904345855e1d28b0e711efa1575 (diff) | |
download | qtmips-608eed5c16366cae251f5d12ad1ed0b988b3ce46.tar.gz qtmips-608eed5c16366cae251f5d12ad1ed0b988b3ce46.tar.bz2 qtmips-608eed5c16366cae251f5d12ad1ed0b988b3ce46.zip |
Implement simple address-space ranges registration and example peripheral.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/qtmipsmachine.cpp')
-rw-r--r-- | qtmips_machine/qtmipsmachine.cpp | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/qtmips_machine/qtmipsmachine.cpp b/qtmips_machine/qtmipsmachine.cpp index 51e5580..0f65609 100644 --- a/qtmips_machine/qtmipsmachine.cpp +++ b/qtmips_machine/qtmipsmachine.cpp @@ -39,6 +39,7 @@ using namespace machine; QtMipsMachine::QtMipsMachine(const MachineConfig &cc) : QObject(), mcnf(&cc) { + MemoryAccess *cpu_mem; stat = ST_READY; ProgramLoader program(cc.elf()); @@ -49,8 +50,16 @@ QtMipsMachine::QtMipsMachine(const MachineConfig &cc) : QObject(), mcnf(&cc) { if (program.get_executable_entry()) regs->pc_abs_jmp(program.get_executable_entry()); mem = new Memory(*mem_program_only); - cch_program = new Cache(mem, &cc.cache_program(), cc.memory_access_time_read(), cc.memory_access_time_write()); - cch_data = new Cache(mem, &cc.cache_data(), cc.memory_access_time_read(), cc.memory_access_time_write()); + cpu_mem = mem; +#if 1 + physaddrspace = new PhysAddrSpace(); + physaddrspace->insert_range(mem, 0x00000000, 0xefffffff, false); + MemoryAccess *periph = new SimplePeripheral(); + physaddrspace->insert_range(periph, 0xffffc000, 0xffffcfff, false); + cpu_mem = physaddrspace; +#endif + cch_program = new Cache(cpu_mem, &cc.cache_program(), cc.memory_access_time_read(), cc.memory_access_time_write()); + cch_data = new Cache(cpu_mem, &cc.cache_data(), cc.memory_access_time_read(), cc.memory_access_time_write()); if (cc.pipelined()) cr = new CorePipelined(regs, cch_program, cch_data, cc.hazard_unit()); |