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* Memory change counter moved to MemoryAccess and external changes ↵Pavel Pisa2019-06-30
| | | | | | | | | | | notification added. This change together with use of PhysAddrSpace as the memory content source for memory and program view allows to access and monitor contents of peripheral registers and frame-buffer memory from graphic user interface. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Fix LB and LH sign extension and LH/SH mask calculation.Pavel Pisa2019-03-13
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add debug access to rword and friends to allow read data through cache ↵Pavel Pisa2019-02-12
| | | | | | | | without disturbing statistic. This allows to switch view between CPU and raw memory content. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implement LL and SC as simple load and store word. SC returns 1 unconditionally.Pavel Pisa2019-02-08
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Implemented simple indication of presence of memory location in the cache.Pavel Pisa2019-02-07
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Added method to retrieve memory location status.Pavel Pisa2019-02-07
| | | | | | | It can inform if given location is cached or if given range is invalid in address space. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Resolve some memory leaks found by Valgrind.Pavel Pisa2019-02-06
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Unified instructions table and access type move to machinedefs.h .Pavel Pisa2019-02-04
| | | | | | | This allows to specify requirement for RS and RD on instruction basis even for T_R / ALU instructions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Add license to the source files.Pavel Pisa2019-02-04
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Correct memory view updates for uncached and write-through case.Pavel Pisa2019-02-03
| | | | Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
* Drop quick jump buttons from memory viewKarel Kočí2018-04-10
| | | | | They are not implemented and even if they would they usage would be little bit funky as they would jump by internal amount of page memory.
* Implement sync for memoryKarel Kočí2018-04-08
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* Drop unneeded mask in memory implementationKarel Kočí2018-04-07
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* Use whole words in memoryKarel Kočí2018-04-05
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* Add focus function to memory viewKarel Kočí2018-01-25
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* Emit byte_change when byte is written to memoryKarel Kočí2018-01-15
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* Implement machine restartKarel Kočí2018-01-05
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* Some pleanups and small fixesKarel Kočí2017-12-21
| | | | | These are just code fixes. Shouldn't change anything but makes code cleaner.
* Put qtmips_machine to machine namespaceKarel Kočí2017-12-17
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* Add AC_NONE to MemoryAccess::AccessControlKarel Kočí2017-12-12
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* Add memory type abstract functionKarel Kočí2017-12-12
| | | | | | This functions can be used to write or read 32bit values from memory and memory on its own does signextends for example depending on passed control value.
* Implement branch and jump instructionsKarel Kočí2017-12-12
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* Don't create memory section on read_byteKarel Kočí2017-12-12
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* Add possibility to compare memory and registers stateKarel Kočí2017-11-21
| | | | | | For core testing we want to compare whole memory and registers. Registers are pretty simple but in case of memory it is some what more complicated and required its own tests to be sure that it works.
* Use QString and QVector instead of std ones and moreKarel Kočí2017-09-02
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* Handle endianness in memory correctlyKarel Kočí2017-08-31
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* Initial commitKarel Kočí2017-08-30
Adding work done so far.