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* Display rs, rt, rd and write register number in all stages.Pavel Pisa2019-01-31
* Correct processing of ORI, ANDI, XORI instructions which require zero-extende...Pavel Pisa2019-01-31
* Do not replace rt by forward if instruction in T_R or store.Pavel Pisa2019-01-30
* Display execution stage forward signals in the view.Pavel Pisa2019-01-30
* Correct hazards processing.Pavel Pisa2019-01-30
* Specify rpath during linking to find qtmips_machine library without install.Pavel Pisa2019-01-30
* Hide some values that shouldn't been visible in no pipelined versionKarel Kočí2018-06-20
* Fix value position for non-pipelined coreKarel Kočí2018-05-24
* Add few more labelsKarel Kočí2018-05-24
* Add few additional labelsKarel Kočí2018-05-24
* Add buses statis viewsKarel Kočí2018-05-24
* Add cache view rendererKarel Kočí2018-05-23
* Ignore hazard unit for nowKarel Kočí2018-05-23
* Add cache statisticsKarel Kočí2018-05-23
* Fix load and store instructionsKarel Kočí2018-05-02
* Initial implementation of cache viewKarel Kočí2018-04-17
* Drop unneeded parameter from CoreViewScene constructorKarel Kočí2018-04-17
* Fix angle scroll speedKarel Kočí2018-04-17
* Store memory and program view address positionKarel Kočí2018-04-17
* When changing focus load it back to edit field in memoryviewKarel Kočí2018-04-15
* Add 2x speedKarel Kočí2018-04-15
* Disable memory protection configuration fields for nowKarel Kočí2018-04-15
* Change presetsKarel Kočí2018-04-15
* Rename CoreView to GraphicsViewKarel Kočí2018-04-15
* Add cache dockKarel Kočí2018-04-15
* Fix coverview memory cacheKarel Kočí2018-04-15
* Show cache statistics in Memory block in coreviewKarel Kočí2018-04-15
* Disable program followKarel Kočí2018-04-14
* Wire up missing control connectionsKarel Kočí2018-04-14
* Drop quick jump buttons from memory viewKarel Kočí2018-04-10
* Fix some instruction string representationKarel Kočí2018-04-08
* Don't insert another column when statictable widget is not widerKarel Kočí2018-04-08
* Change string format for some instructionKarel Kočí2018-04-08
* Implement LUIKarel Kočí2018-04-08
* Implement sync for memoryKarel Kočí2018-04-08
* Ensure that set, block and assoc. is in minimum oneKarel Kočí2018-04-08
* Integrate cache with rest of the machine coreKarel Kočí2018-04-08
* Add associative cacheKarel Kočí2018-04-08
* Tweak shortcuts for primary windowKarel Kočí2018-04-07
* Drop unneeded mask in memory implementationKarel Kočí2018-04-07
* Add initial implementatio of cachesKarel Kočí2018-04-07
* Just note that we are checking endianity automaticallyKarel Kočí2018-04-05
* Use whole words in memoryKarel Kočí2018-04-05
* Add control signals for non-pipelined cpuKarel Kočí2018-03-22
* Append some TODOsKarel Kočí2018-03-06
* Fix forwarding checker for I and J and S* instructionsKarel Kočí2018-03-06
* Implement Cache configurationKarel Kočí2018-03-06
* Forward from execute stage to decode stage latchKarel Kočí2018-02-14
* Do empty fetch stage to report fetch even if we stallKarel Kočí2018-02-14
* Another swap in instruction decodingKarel Kočí2018-02-14
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