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* Correct parsing of register + offset operands, i.e., LW and SW.Pavel Pisa2019-03-06
* Include description of partial coprocessor 0 support in README.Pavel Pisa2019-03-05
* Try the strict check of encoded instructions and relax break and other.Pavel Pisa2019-03-05
* Complete revamp of disassembler and assembler arguments processing.Pavel Pisa2019-03-05
* Dock to view coprocessor 0 and cop0 counter/comparator support.Pavel Pisa2019-03-05
* Use irq 3 (HW1) for Rx and irq 2 (HW0) for Tx to be compatible with SPIM.Pavel Pisa2019-03-04
* Implemented interrupt delivery and processing for serial port.Pavel Pisa2019-03-04
* Implemented coprocessor 0 registers access and register EPC and Cause set by ...Pavel Pisa2019-03-04
* build.sh: use -recursive instead of explicit listKarel Kočí2019-03-02
* Add dependency of qtmips_gui on qtmips_osemu.Pavel Pisa2019-03-02
* Simple serial port receive implementation.Pavel Pisa2019-02-25
* Exceptions causes align with SPIM and add serial port range alias equivalent ...Pavel Pisa2019-02-25
* Change serial port peripheral to match SPIM registers definition.Pavel Pisa2019-02-25
* Correct relative jumps range and adjust it for single core without delay-slot.Pavel Pisa2019-02-24
* README - update list of supported instructions.Pavel Pisa2019-02-24
* Implement ROTR and ROTRV and full decode of WSBH, SEB and SEH.Pavel Pisa2019-02-24
* Add some more labels and clarify rs, rt, rd in execute stage.Pavel Pisa2019-02-24
* Add action to show symbols into pull down menu.Pavel Pisa2019-02-22
* Add support for goto to selected symbol address.Pavel Pisa2019-02-22
* Ensure that cache view and memory status are updated after cache flush.Pavel Pisa2019-02-21
* Added test for LWR, LWL, SWR and SWL instructions.Pavel Pisa2019-02-21
* Add burst time and store timing in the config.Pavel Pisa2019-02-21
* Adjust label of PC to R31 and add jump to reg.Pavel Pisa2019-02-20
* Distinguish between write-through cache with allocate and update only if hit.Pavel Pisa2019-02-20
* Update project files to adapt for release and debug libraries location for Wi...Pavel Pisa2019-02-19
* Update MultiText to use setPointSize too.Pavel Pisa2019-02-19
* pointSize -> pixelSizeFanda Vacek2019-02-19
* variable font sizeFanda Vacek2019-02-19
* The sizeHint seems to not be affected by invisible zero size problem.Pavel Pisa2019-02-19
* Clear LFU statistic for the kicked out cache-line.Pavel Pisa2019-02-18
* Add unlimited checkbox to the tool-bar.Pavel Pisa2019-02-18
* Report forward and stall for branches and add forward to execution phase.Pavel Pisa2019-02-18
* Correct ADD operation to map to ALU variant with overflow checking.Pavel Pisa2019-02-18
* Visualize request to stall and stall in execution phase and exception sources.Pavel Pisa2019-02-18
* Stall the pipeline even for branch which requires memory read as argument.Pavel Pisa2019-02-18
* Update homepage to point to CVUT GitHub repository.Pavel Pisa2019-02-18
* Do not update instruction in the decode stage when stalled.Pavel Pisa2019-02-17
* docs: more clarification how to use compillersPavel Pisa2019-02-17
* docs: startup code for both PIC and non-PIC environments.Pavel Pisa2019-02-17
* Ignore LWC1, LWD1, SWC1 and SDC1 instructions.Pavel Pisa2019-02-17
* Pass arithmetic exception trough pipeline and implement trap support and inst...Pavel Pisa2019-02-17
* Change RGB LEDs signals and slots to unsigned value.Pavel Pisa2019-02-16
* Correct final loop label in documentation.Pavel Pisa2019-02-16
* Enable copy from memory and program views.Pavel Pisa2019-02-15
* System calls stubs for brk and mmap2.Pavel Pisa2019-02-15
* Multiply and accumulate and CLZ/CLO operations added.Pavel Pisa2019-02-15
* Implement EXT instruction used in GLIBC startup.Pavel Pisa2019-02-15
* Core: move complex memory operation to own function and implement LWL, LWR, S...Pavel Pisa2019-02-15
* Fill the rest of ALU opcode table to file all 64 entries.Pavel Pisa2019-02-14
* The conversion of address has to use toULong to allow access to the second pa...Pavel Pisa2019-02-14