4 files changed, 30 insertions, 20 deletions

diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp
index faebd87..805d9be 100644
--- a/qtmips_machine/core.cpp
+++ b/qtmips_machine/core.cpp
@@ -103,8 +103,9 @@ struct Core::dtFetch Core::fetch() {
     };
 }
 
-struct Core::dtDecode Core::decode(struct dtFetch dt) {
-    struct DecodeMap dec = dmap[dt.inst.opcode()];
+struct Core::dtDecode Core::decode(const struct dtFetch &dt) {
+    emit instruction_decoded(dt.inst);
+    const struct DecodeMap &dec = dmap[dt.inst.opcode()];
     if (!(dec.flags & DM_SUPPORTED))
         // TODO message
         throw QTMIPS_EXCEPTION(UnsupportedInstruction, "", "");
@@ -128,8 +129,8 @@ struct Core::dtDecode Core::decode(struct dtFetch dt) {
     // TODO on jump there should be delay slot. Does processor addes it or compiler. And do we care?
 }
 
-struct Core::dtExecute Core::execute(struct dtDecode dt) {
-    // TODO signals
+struct Core::dtExecute Core::execute(const struct dtDecode &dt) {
+    emit instruction_executed(dt.inst);
 
     // Handle conditional move (we have to change regwrite signal if conditional is not met)
     // TODO can't we do this some cleaner way?
@@ -142,6 +143,7 @@ struct Core::dtExecute Core::execute(struct dtDecode dt) {
         alu_sec = ((dt.inst.immediate() & 0x8000) << 16) | (dt.inst.immediate() & 0x7FFF); // Sign extend to 32bit
 
     return {
+        .inst = dt.inst,
         .memread = dt.memread,
         .memwrite = dt.memwrite,
         .regwrite = regwrite,
@@ -152,8 +154,8 @@ struct Core::dtExecute Core::execute(struct dtDecode dt) {
     };
 }
 
-struct Core::dtMemory Core::memory(struct dtExecute dt) {
-    // TODO signals
+struct Core::dtMemory Core::memory(const struct dtExecute &dt) {
+    emit instruction_memory(dt.inst);
     std::uint32_t towrite_val = dt.alu_val;
 
     if (dt.memwrite)
@@ -162,20 +164,20 @@ struct Core::dtMemory Core::memory(struct dtExecute dt) {
         towrite_val = mem->read_ctl(dt.memctl, dt.alu_val);
 
     return {
+        .inst = dt.inst,
         .regwrite = dt.regwrite,
         .rwrite = dt.rwrite,
         .towrite_val = towrite_val,
     };
 }
 
-void Core::writeback(struct dtMemory dt) {
-    if (dt.regwrite) {
+void Core::writeback(const struct dtMemory &dt) {
+    emit instruction_writeback(dt.inst);
+    if (dt.regwrite)
         regs->write_gp(dt.rwrite, dt.towrite_val);
-    }
 }
 
-void Core::handle_pc(struct dtDecode dt) {
-    // TODO signals
+void Core::handle_pc(const struct dtDecode &dt) {
     bool branch = false;
     bool link = false;
     // TODO implement link
@@ -242,6 +244,7 @@ void Core::dtDecodeInit(struct dtDecode &dt) {
 }
 
 void Core::dtExecuteInit(struct dtExecute &dt) {
+    dt.inst = Instruction(0x00);
     dt.memread = false;
     dt.memwrite = false;
     dt.regwrite = false;
@@ -252,6 +255,7 @@ void Core::dtExecuteInit(struct dtExecute &dt) {
 }
 
 void Core::dtMemoryInit(struct dtMemory &dt) {
+    dt.inst = Instruction(0x00);
     dt.regwrite = false;
     dt.rwrite = false;
     dt.towrite_val = 0;
@@ -297,7 +301,7 @@ CorePipelined::CorePipelined(Registers *regs, MemoryAccess *mem) : \
 void CorePipelined::step() {
     // TODO implement forward unit
     writeback(dt_m);
-    dt_m =memory(dt_e);
+    dt_m = memory(dt_e);
     dt_e = execute(dt_d);
     dt_d = decode(dt_f);
     dt_f = fetch();
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h
index 1878bfc..3078c95 100644
--- a/qtmips_machine/core.h
+++ b/qtmips_machine/core.h
@@ -20,7 +20,11 @@ public:
     virtual void reset() = 0; // Reset core (only core, memory and registers has to be reseted separately)
 
 signals:
-    void instruction_fetched(machine::Instruction &inst);
+    void instruction_fetched(const machine::Instruction &inst);
+    void instruction_decoded(const machine::Instruction &inst);
+    void instruction_executed(const machine::Instruction &inst);
+    void instruction_memory(const machine::Instruction &inst);
+    void instruction_writeback(const machine::Instruction &inst);
 
 protected:
     Registers *regs;
@@ -42,6 +46,7 @@ protected:
         std::uint32_t val_rt; // Value from register rt
     };
     struct dtExecute {
+        Instruction inst;
         bool memread;
         bool memwrite;
         bool regwrite;
@@ -51,17 +56,18 @@ protected:
         std::uint32_t alu_val; // Result of ALU execution
     };
     struct dtMemory {
+        Instruction inst;
         bool regwrite;
         std::uint8_t rwrite;
         std::uint32_t towrite_val;
     };
 
     struct dtFetch fetch();
-    struct dtDecode decode(struct dtFetch);
-    struct dtExecute execute(struct dtDecode);
-    struct dtMemory memory(struct dtExecute);
-    void writeback(struct dtMemory);
-    void handle_pc(struct dtDecode);
+    struct dtDecode decode(const struct dtFetch&);
+    struct dtExecute execute(const struct dtDecode&);
+    struct dtMemory memory(const struct dtExecute&);
+    void writeback(const struct dtMemory&);
+    void handle_pc(const struct dtDecode&);
 
     // Initialize structures to NOPE instruction
     void dtFetchInit(struct dtFetch &dt);
diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp
index edb6305..4ef65a4 100644
--- a/qtmips_machine/instruction.cpp
+++ b/qtmips_machine/instruction.cpp
@@ -228,7 +228,7 @@ static const struct AluInstructionMap alu_instruction_map[] = {
 };
 #undef AIM_UNKNOWN
 
-QString Instruction::to_str() {
+QString Instruction::to_str() const {
     // TODO there are exception where some fields are zero and such so we should not print them in sych case
     if  (opcode() >= (sizeof(instruction_map) / sizeof(struct InstructionMap)))
         return QString("UNKNOWN");
diff --git a/qtmips_machine/instruction.h b/qtmips_machine/instruction.h
index 6232d3e..d84b0cb 100644
--- a/qtmips_machine/instruction.h
+++ b/qtmips_machine/instruction.h
@@ -29,7 +29,7 @@ public:
     bool operator!=(const Instruction &c) const;
     Instruction &operator=(const Instruction &c);
 
-    QString to_str();
+    QString to_str() const;
 
 private:
     std::uint32_t dt;