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-rw-r--r--qtmips_machine/tests/testalu.cpp22
-rw-r--r--qtmips_machine/tests/testcore.cpp23
-rw-r--r--qtmips_machine/tests/testmemory.cpp28
-rw-r--r--qtmips_machine/tests/tst_machine.h1
4 files changed, 56 insertions, 18 deletions
diff --git a/qtmips_machine/tests/testalu.cpp b/qtmips_machine/tests/testalu.cpp
index 37accdf..2943906 100644
--- a/qtmips_machine/tests/testalu.cpp
+++ b/qtmips_machine/tests/testalu.cpp
@@ -3,49 +3,49 @@
#include "qtmipsexception.h"
void MachineTests::alu_data() {
- QTest::addColumn<std::uint8_t>("op");
+ QTest::addColumn<AluOp>("op");
QTest::addColumn<std::uint32_t>("s");
QTest::addColumn<std::uint32_t>("t");
QTest::addColumn<std::uint8_t>("sa");
QTest::addColumn<std::uint32_t>("res");
// TODO SLL-SRAV
- QTest::newRow("ADD") << (std::uint8_t)ALU_OP_ADD \
+ QTest::newRow("ADD") << ALU_OP_ADD \
<< (std::uint32_t)24 \
<< (std::uint32_t)66 \
<< (std::uint8_t)0 \
<< (std::uint32_t)90;
- QTest::newRow("ADDU") << (std::uint8_t)ALU_OP_ADDU \
+ QTest::newRow("ADDU") << ALU_OP_ADDU \
<< (std::uint32_t)24 \
<< (std::uint32_t)66 \
<< (std::uint8_t)0 \
<< (std::uint32_t)90;
- QTest::newRow("SUB") << (std::uint8_t)ALU_OP_SUB \
+ QTest::newRow("SUB") << ALU_OP_SUB \
<< (std::uint32_t)66 \
<< (std::uint32_t)24 \
<< (std::uint8_t)0 \
<< (std::uint32_t)42;
- QTest::newRow("SUBU") << (std::uint8_t)ALU_OP_SUBU \
+ QTest::newRow("SUBU") << ALU_OP_SUBU \
<< (std::uint32_t)24 \
<< (std::uint32_t)66 \
<< (std::uint8_t)0 \
<< (std::uint32_t)-42;
- QTest::newRow("AND") << (std::uint8_t)ALU_OP_AND \
+ QTest::newRow("AND") << ALU_OP_AND \
<< (std::uint32_t)0xA81 \
<< (std::uint32_t)0x603 \
<< (std::uint8_t)0 \
<< (std::uint32_t)0x201;
- QTest::newRow("OR") << (std::uint8_t)ALU_OP_OR \
+ QTest::newRow("OR") << ALU_OP_OR \
<< (std::uint32_t)0xA81 \
<< (std::uint32_t)0x603 \
<< (std::uint8_t)0 \
<< (std::uint32_t)0xE83;
- QTest::newRow("XOR") << (std::uint8_t)ALU_OP_XOR \
+ QTest::newRow("XOR") << ALU_OP_XOR \
<< (std::uint32_t)0xA81 \
<< (std::uint32_t)0x603 \
<< (std::uint8_t)0 \
<< (std::uint32_t)0xC82;
- QTest::newRow("NOR") << (std::uint8_t)ALU_OP_NOR \
+ QTest::newRow("NOR") << ALU_OP_NOR \
<< (std::uint32_t)0xA81 \
<< (std::uint32_t)0x603 \
<< (std::uint8_t)0 \
@@ -54,13 +54,13 @@ void MachineTests::alu_data() {
}
void MachineTests::alu() {
- QFETCH(std::uint8_t, op);
+ QFETCH(AluOp, op);
QFETCH(std::uint32_t, s);
QFETCH(std::uint32_t, t);
QFETCH(std::uint8_t, sa);
QFETCH(std::uint32_t, res);
- QCOMPARE(alu_operate((enum AluOp)op, s , t, sa), res);
+ QCOMPARE(alu_operate(op, s , t, sa), res);
}
void MachineTests::alu_except_data() {
diff --git a/qtmips_machine/tests/testcore.cpp b/qtmips_machine/tests/testcore.cpp
index bbf8086..33bf07e 100644
--- a/qtmips_machine/tests/testcore.cpp
+++ b/qtmips_machine/tests/testcore.cpp
@@ -2,28 +2,43 @@
#include "core.h"
void MachineTests::core_regs_data() {
- /*
QTest::addColumn<Instruction>("i");
QTest::addColumn<Registers>("init");
QTest::addColumn<Registers>("res");
// Test arithmetic instructions
{
- Registers regs_init();
+ Registers regs_init;
regs_init.write_gp(24, 12);
regs_init.write_gp(25, 24);
- Registers regs_res(&regs_init);
+ Registers regs_res(regs_init);
regs_res.write_gp(26, 36);
QTest::newRow("ADD") << Instruction(0, 24, 25, 26, 0, 32) \
<< regs_init \
<< regs_res;
}
- */
// TODO test other operations
}
void MachineTests::core_regs() {
+ QTest::addColumn<Instruction>("i");
+ QTest::addColumn<Registers>("init");
+ QTest::addColumn<Registers>("res");
+ QFETCH(Instruction, i);
+ QFETCH(Registers, init);
+ QFETCH(Registers, res);
+
+ Memory mem; // Just memory (it shouldn't be used here except instruction)
+ mem.write_word(res.read_pc(), i.data()); // Store single instruction (anything else should be 0 so NOP effectively)
+
+ // Test on non-piplined
+ Memory mem_single(mem); // Create memory copy
+ CoreSingle core_single(&init, &mem_single);
+ core_single.step(); // Single step should be enought as this is risc without pipeline
+ //QCOMPARE(init, res); // After doing changes from initial state this should be same state as in case of passed expected result
+ QCOMPARE(mem, mem_single); // There should be no change in memory
+ // TODO on pipelined core
}
void MachineTests::core_mem_data() {
diff --git a/qtmips_machine/tests/testmemory.cpp b/qtmips_machine/tests/testmemory.cpp
index e450231..091c26d 100644
--- a/qtmips_machine/tests/testmemory.cpp
+++ b/qtmips_machine/tests/testmemory.cpp
@@ -44,8 +44,7 @@ void MachineTests::memory_section() {
QFETCH(std::uint32_t, address);
- // First section shouldn't exists
- QCOMPARE(m.get_section(address, false), (MemorySection*)nullptr);
+ // First section shouldn't exists QCOMPARE(m.get_section(address, false), (MemorySection*)nullptr);
// Create section
MemorySection *s = m.get_section(address, true);
QVERIFY(s != nullptr);
@@ -63,7 +62,7 @@ void MachineTests::memory_section() {
void MachineTests::memory_endian() {
Memory m;
- // Memory should be bit endian so write bytes from most significant byte
+ // Memory should be little endian so write bytes from most significant byte
m.write_byte(0x00, 0x12);
m.write_byte(0x01, 0x34);
m.write_byte(0x02, 0x56);
@@ -81,3 +80,26 @@ void MachineTests::memory_endian() {
QCOMPARE(m.read_byte(0xF2), (std::uint8_t)0x56);
QCOMPARE(m.read_byte(0xF3), (std::uint8_t)0x78);
}
+
+void MachineTests::memory_compare() {
+ Memory m1, m2;
+ QCOMPARE(m1, m2);
+ m1.write_byte(0x20,0x0);
+ QVERIFY(m1 != m2); // This should not be equal as this identifies also memory write (difference between no write and zero write)
+ m1.write_byte(0x20,0x24);
+ QVERIFY(m1 != m2);
+ m2.write_byte(0x20,0x23);
+ QVERIFY(m1 != m2);
+ m2.write_byte(0x20,0x24);
+ QCOMPARE(m1, m2);
+ // Do the same with some other section
+ m1.write_byte(0xFFFF20, 0x24);
+ QVERIFY(m1 != m2);
+ m2.write_byte(0xFFFF20, 0x24);
+ QCOMPARE(m1, m2);
+ // And also check memory copy
+ Memory m3(m1);
+ QCOMPARE(m1, m3);
+ m3.write_byte(0x18, 0x22);
+ QVERIFY(m1 != m3);
+}
diff --git a/qtmips_machine/tests/tst_machine.h b/qtmips_machine/tests/tst_machine.h
index da8082a..b509bed 100644
--- a/qtmips_machine/tests/tst_machine.h
+++ b/qtmips_machine/tests/tst_machine.h
@@ -17,6 +17,7 @@ private Q_SLOTS:
void memory_section();
void memory_section_data();
void memory_endian();
+ void memory_compare();
// Program loader
void program_loader();
// Instruction
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 12:50:22 +0000