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-rw-r--r--qtmips_cli/tracer.cpp20
-rw-r--r--qtmips_cli/tracer.h10
-rw-r--r--qtmips_gui/coreview/instructionview.cpp11
-rw-r--r--qtmips_gui/coreview/instructionview.h3
-rw-r--r--qtmips_machine/core.cpp24
-rw-r--r--qtmips_machine/core.h12
6 files changed, 43 insertions, 37 deletions
diff --git a/qtmips_cli/tracer.cpp b/qtmips_cli/tracer.cpp
index 097842c..198ca89 100644
--- a/qtmips_cli/tracer.cpp
+++ b/qtmips_cli/tracer.cpp
@@ -102,24 +102,24 @@ void Tracer::reg_hi() {
r_hi = true;
}
-void Tracer::instruction_fetch(const Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause) {
- cout << "Fetch: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
+void Tracer::instruction_fetch(const Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid) {
+ cout << "Fetch: " << (excause != EXCAUSE_NONE? "!": "") << (valid? inst.to_str(inst_addr).toStdString() : "Idle") << endl;
}
-void Tracer::instruction_decode(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
- cout << "Decode: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
+void Tracer::instruction_decode(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause, bool valid) {
+ cout << "Decode: " << (excause != EXCAUSE_NONE? "!": "") << (valid? inst.to_str(inst_addr).toStdString() : "Idle") << endl;
}
-void Tracer::instruction_execute(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
- cout << "Execute: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
+void Tracer::instruction_execute(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause, bool valid) {
+ cout << "Execute: " << (excause != EXCAUSE_NONE? "!": "") << (valid? inst.to_str(inst_addr).toStdString() : "Idle") << endl;
}
-void Tracer::instruction_memory(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
- cout << "Memory: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
+void Tracer::instruction_memory(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause, bool valid) {
+ cout << "Memory: " << (excause != EXCAUSE_NONE? "!": "") << (valid? inst.to_str(inst_addr).toStdString() : "Idle") << endl;
}
-void Tracer::instruction_writeback(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause) {
- cout << "Writeback: " << (excause != EXCAUSE_NONE? "!": "") << inst.to_str(inst_addr).toStdString() << endl;
+void Tracer::instruction_writeback(const machine::Instruction &inst, uint32_t inst_addr, ExceptionCause excause, bool valid) {
+ cout << "Writeback: " << (excause != EXCAUSE_NONE? "!": "") << (valid? inst.to_str(inst_addr).toStdString() : "Idle") << endl;
}
void Tracer::regs_pc_update(std::uint32_t val) {
diff --git a/qtmips_cli/tracer.h b/qtmips_cli/tracer.h
index eefad8e..95af98d 100644
--- a/qtmips_cli/tracer.h
+++ b/qtmips_cli/tracer.h
@@ -57,11 +57,11 @@ public:
void reg_hi();
private slots:
- void instruction_fetch(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
- void instruction_decode(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
- void instruction_execute(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
- void instruction_memory(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
- void instruction_writeback(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause);
+ void instruction_fetch(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause, bool valid);
+ void instruction_decode(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause, bool valid);
+ void instruction_execute(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause, bool valid);
+ void instruction_memory(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause, bool valid);
+ void instruction_writeback(const machine::Instruction &inst, uint32_t inst_addr, machine::ExceptionCause excause, bool valid);
void regs_pc_update(std::uint32_t val);
void regs_gp_update(std::uint8_t i, std::uint32_t val);
diff --git a/qtmips_gui/coreview/instructionview.cpp b/qtmips_gui/coreview/instructionview.cpp
index d5dbba6..b076cf1 100644
--- a/qtmips_gui/coreview/instructionview.cpp
+++ b/qtmips_gui/coreview/instructionview.cpp
@@ -54,8 +54,9 @@ InstructionView::InstructionView(QColor bgnd) : QGraphicsObject(nullptr), text(t
f.setPointSize(FontSize::SIZE6);
text.setFont(f);
this->bgnd = bgnd;
+ valid = false;
// Initialize to NOP
- instruction_update(machine::Instruction(), 0, machine::EXCAUSE_NONE);
+ instruction_update(machine::Instruction(), 0, machine::EXCAUSE_NONE, false);
}
QRectF InstructionView::boundingRect() const {
@@ -65,15 +66,19 @@ QRectF InstructionView::boundingRect() const {
void InstructionView::paint(QPainter *painter, const QStyleOptionGraphicsItem *option __attribute__((unused)), QWidget *widget __attribute__((unused))) {
painter->setPen(QPen(QColor(240, 240, 240)));
if (excause == machine::EXCAUSE_NONE)
- painter->setBrush(QBrush(bgnd));
+ if (valid)
+ painter->setBrush(QBrush(bgnd));
+ else
+ painter->setBrush(QBrush(QColor(240, 240, 240)));
else
painter->setBrush(QBrush(QColor(255, 100, 100)));
painter->drawRoundRect(-WIDTH/2, 0, WIDTH, HEIGHT, ROUND, ROUND);
}
void InstructionView::instruction_update(const machine::Instruction &i,
- std::uint32_t inst_addr, machine::ExceptionCause excause) {
+ std::uint32_t inst_addr, machine::ExceptionCause excause, bool valid) {
+ this->valid = valid;
QRectF prev_box = boundingRect();
text.setText(i.to_str(inst_addr));
this->excause = excause;
diff --git a/qtmips_gui/coreview/instructionview.h b/qtmips_gui/coreview/instructionview.h
index bdcaf3c..59dfad2 100644
--- a/qtmips_gui/coreview/instructionview.h
+++ b/qtmips_gui/coreview/instructionview.h
@@ -52,12 +52,13 @@ public:
public slots:
void instruction_update(const machine::Instruction &i, std::uint32_t inst_addr,
- machine::ExceptionCause excause);
+ machine::ExceptionCause excause, bool valid);
private:
QGraphicsSimpleTextItem text;
machine::ExceptionCause excause;
QColor bgnd;
+ bool valid;
};
}
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp
index 187ca2f..dead427 100644
--- a/qtmips_machine/core.cpp
+++ b/qtmips_machine/core.cpp
@@ -269,7 +269,7 @@ struct Core::dtFetch Core::fetch(bool skip_break) {
}
emit fetch_inst_addr_value(inst_addr);
- emit instruction_fetched(inst, inst_addr, excause);
+ emit instruction_fetched(inst, inst_addr, excause, true);
return {
.inst = inst,
.inst_addr = inst_addr,
@@ -318,7 +318,7 @@ struct Core::dtDecode Core::decode(const struct dtFetch &dt) {
}
emit decode_inst_addr_value(dt.is_valid? dt.inst_addr: STAGEADDR_NONE);
- emit instruction_decoded(dt.inst, dt.inst_addr, excause);
+ emit instruction_decoded(dt.inst, dt.inst_addr, excause, dt.is_valid);
emit decode_instruction_value(dt.inst.data());
emit decode_reg1_value(val_rs);
emit decode_reg2_value(val_rt);
@@ -450,7 +450,7 @@ struct Core::dtExecute Core::execute(const struct dtDecode &dt) {
}
emit execute_inst_addr_value(dt.is_valid? dt.inst_addr: STAGEADDR_NONE);
- emit instruction_executed(dt.inst, dt.inst_addr, excause);
+ emit instruction_executed(dt.inst, dt.inst_addr, excause, dt.is_valid);
emit execute_alu_value(alu_val);
emit execute_reg1_value(dt.val_rs);
emit execute_reg2_value(dt.val_rt);
@@ -518,7 +518,7 @@ struct Core::dtMemory Core::memory(const struct dtExecute &dt) {
}
emit memory_inst_addr_value(dt.is_valid? dt.inst_addr: STAGEADDR_NONE);
- emit instruction_memory(dt.inst, dt.inst_addr, dt.excause);
+ emit instruction_memory(dt.inst, dt.inst_addr, dt.excause, dt.is_valid);
emit memory_alu_value(dt.alu_val);
emit memory_rt_value(dt.val_rt);
emit memory_mem_value(memread ? towrite_val : 0);
@@ -546,7 +546,7 @@ struct Core::dtMemory Core::memory(const struct dtExecute &dt) {
void Core::writeback(const struct dtMemory &dt) {
emit writeback_inst_addr_value(dt.is_valid? dt.inst_addr: STAGEADDR_NONE);
- emit instruction_writeback(dt.inst, dt.inst_addr, dt.excause);
+ emit instruction_writeback(dt.inst, dt.inst_addr, dt.excause, dt.is_valid);
emit writeback_value(dt.towrite_val);
emit writeback_regw_value(dt.regwrite);
emit writeback_regw_num_value(dt.rwrite);
@@ -556,7 +556,7 @@ void Core::writeback(const struct dtMemory &dt) {
bool Core::handle_pc(const struct dtDecode &dt) {
bool branch = false;
- emit instruction_program_counter(dt.inst, dt.inst_addr, EXCAUSE_NONE);
+ emit instruction_program_counter(dt.inst, dt.inst_addr, EXCAUSE_NONE, dt.is_valid);
if (dt.jump) {
if (!dt.bjr_req_rs) {
@@ -701,7 +701,7 @@ void CoreSingle::do_step(bool skip_break) {
if ((m.stop_if || (m.excause != EXCAUSE_NONE)) && dt_f != nullptr) {
dtFetchInit(*dt_f);
- emit instruction_fetched(dt_f->inst, dt_f->inst_addr, dt_f->excause);
+ emit instruction_fetched(dt_f->inst, dt_f->inst_addr, dt_f->excause, dt_f->is_valid);
emit fetch_inst_addr_value(STAGEADDR_NONE);
} else {
branch_taken = handle_pc(d);
@@ -758,19 +758,19 @@ void CorePipelined::do_step(bool skip_break) {
excpt_in_progress = dt_m.excause != EXCAUSE_NONE;
if (excpt_in_progress) {
dtExecuteInit(dt_e);
- emit instruction_executed(dt_e.inst, dt_e.inst_addr, dt_e.excause);
+ emit instruction_executed(dt_e.inst, dt_e.inst_addr, dt_e.excause, dt_e.is_valid);
emit execute_inst_addr_value(STAGEADDR_NONE);
}
excpt_in_progress = excpt_in_progress || dt_e.excause != EXCAUSE_NONE;
if (excpt_in_progress) {
dtDecodeInit(dt_d);
- emit instruction_decoded(dt_d.inst, dt_d.inst_addr, dt_d.excause);
+ emit instruction_decoded(dt_d.inst, dt_d.inst_addr, dt_d.excause, dt_d.is_valid);
emit decode_inst_addr_value(STAGEADDR_NONE);
}
excpt_in_progress = excpt_in_progress || dt_e.excause != EXCAUSE_NONE;
if (excpt_in_progress) {
dtFetchInit(dt_f);
- emit instruction_fetched(dt_f.inst, dt_f.inst_addr, dt_f.excause);
+ emit instruction_fetched(dt_f.inst, dt_f.inst_addr, dt_f.excause, dt_f.is_valid);
emit fetch_inst_addr_value(STAGEADDR_NONE);
if (dt_m.excause != EXCAUSE_NONE) {
regs->pc_abs_jmp(dt_e.inst_addr);
@@ -886,7 +886,7 @@ void CorePipelined::do_step(bool skip_break) {
} else {
if (dt_d.nb_skip_ds) {
dtFetchInit(dt_f);
- emit instruction_fetched(dt_f.inst, dt_f.inst_addr, dt_f.excause);
+ emit instruction_fetched(dt_f.inst, dt_f.inst_addr, dt_f.excause, dt_f.is_valid);
emit fetch_inst_addr_value(STAGEADDR_NONE);
}
}
@@ -900,7 +900,7 @@ void CorePipelined::do_step(bool skip_break) {
} else {
dtFetchInit(dt_f);
}
- // emit instruction_decoded(dt_d.inst, dt_d.inst_addr, dt_d.excause);
+ // emit instruction_decoded(dt_d.inst, dt_d.inst_addr, dt_d.excause, dt_d.is_valid);
}
}
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h
index 6b025db..86adcfa 100644
--- a/qtmips_machine/core.h
+++ b/qtmips_machine/core.h
@@ -100,12 +100,12 @@ public:
};
signals:
- void instruction_fetched(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause);
- void instruction_decoded(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause);
- void instruction_executed(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause);
- void instruction_memory(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause);
- void instruction_writeback(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause);
- void instruction_program_counter(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause);
+ void instruction_fetched(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid);
+ void instruction_decoded(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid);
+ void instruction_executed(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid);
+ void instruction_memory(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid);
+ void instruction_writeback(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid);
+ void instruction_program_counter(const machine::Instruction &inst, std::uint32_t inst_addr, ExceptionCause excause, bool valid);
void fetch_inst_addr_value(std::uint32_t);
void fetch_jump_reg_value(std::uint32_t);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-25 01:00:50 +0000