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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-15 15:03:12 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-15 15:03:12 +0100
commitab9ddf2beb8a266dd31e31178c53616b79ce4428 (patch)
tree8f07e33893e6489e646000f98705306b33c2e39a /tests
parent8f2b5459c4fc32bd4890b89b9309a2c6d24e61f9 (diff)
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Core: move complex memory operation to own function and implement LWL, LWR, SWL, SWR.
The move makes basic memory stage processing more readable. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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