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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-02 23:38:56 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-02 23:38:56 +0100
commit12536c28a74e3b1fd6f5d1213311c809f9ddf824 (patch)
tree1c9f2969a58bb1deadcad6a366e51173f3913c89 /tests/cpu_trap
parente7343cdbb296f51ce83a7236441008c62bc2b52c (diff)
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Implement realistic hazard resolution for JR, JALR, BEQ, BNE, BLTZ, BGEZ instructions.
The previous code worked by chance only because decode has been fully processed including forwarding from M and W before PC processing started. But in real hardware the PC processing runs in parallel with ALU and cannot read its results in the same cycle. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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