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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-08 19:11:45 +0100 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-08 19:11:45 +0100 |
| commit | 5a4b106f98545c1593fa7104fc526c3bf6123698 (patch) | |
| tree | c007eba82fe32e2fdda48070349aa7bdbf85731f /tests/cpu_trap/trap.S | |
| parent | fb8fbbedea035fdf05987d1f6a32cb74de74d298 (diff) | |
| download | qtmips-5a4b106f98545c1593fa7104fc526c3bf6123698.tar.gz qtmips-5a4b106f98545c1593fa7104fc526c3bf6123698.tar.bz2 qtmips-5a4b106f98545c1593fa7104fc526c3bf6123698.zip | |
Accept SINC and SINCI instructions and flush even instruction cache on CACHE opcode.
Because individual cache maintenance operations are not decoded,
be on safe side and flush all caches when CACHE operation
is processed,
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'tests/cpu_trap/trap.S')
0 files changed, 0 insertions, 0 deletions