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authorKarel Kočí <cynerd@email.cz>2018-01-03 12:43:17 +0100
committerKarel Kočí <cynerd@email.cz>2018-01-03 12:43:17 +0100
commit22e2fe92f52e68b8951a2dff1a0de9e05ddf9c7f (patch)
tree24d16206784d98f768ff800ab50eb8389d22f295 /qtmips_machine
parent76876d39ba4a9c842786304b8ccf0249fab2999c (diff)
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Add trace-feth to qtmips_cli
Diffstat (limited to 'qtmips_machine')
-rw-r--r--qtmips_machine/core.cpp4
-rw-r--r--qtmips_machine/core.h1
2 files changed, 3 insertions, 2 deletions
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp
index 000d76d..276931c 100644
--- a/qtmips_machine/core.cpp
+++ b/qtmips_machine/core.cpp
@@ -25,7 +25,7 @@ struct DecodeMap {
// This is map from opcode to signals.
static const struct DecodeMap dmap[] = {
{ .flags = DM_SUPPORTED | DM_REGD | DM_REGWRITE, NOALU, NOMEM }, // Alu operations (aluop is decoded from function explicitly)
- { .flags = DM_SUPPORTED, NOALU, NOMEM }, // REGIMM (BLTZ, BGEZ, )
+ { .flags = DM_SUPPORTED, NOALU, NOMEM }, // REGIMM (BLTZ, BGEZ)
{ .flags = DM_SUPPORTED, NOALU, NOMEM }, // J
NOPE, // JAL
{ .flags = DM_SUPPORTED, NOALU, NOMEM }, // BEQ
@@ -96,8 +96,8 @@ Core::Core(Registers *regs, MemoryAccess *mem) {
}
struct Core::dtFetch Core::fetch() {
- // TODO signals
Instruction inst(mem->read_word(regs->read_pc()));
+ emit instruction_fetched(inst);
return {
.inst = inst
};
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h
index fc61429..b09e297 100644
--- a/qtmips_machine/core.h
+++ b/qtmips_machine/core.h
@@ -18,6 +18,7 @@ public:
virtual void step() = 0; // Do single step
signals:
+ void instruction_fetched(machine::Instruction &inst);
protected:
Registers *regs;