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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-07 10:34:07 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-07 10:34:07 +0100 |
commit | 01147f6f0855a1be9ded74995328d03bc9463b46 (patch) | |
tree | 437eac80358ca00e614a21e7e027555f8bfd377b /qtmips_machine | |
parent | cf8c2cfcfc3477fa5434f041c38ef025844c5f60 (diff) | |
download | qtmips-01147f6f0855a1be9ded74995328d03bc9463b46.tar.gz qtmips-01147f6f0855a1be9ded74995328d03bc9463b46.tar.bz2 qtmips-01147f6f0855a1be9ded74995328d03bc9463b46.zip |
Remove dependency of ALU operation encoding on MIPS instruction format.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine')
-rw-r--r-- | qtmips_machine/alu.cpp | 14 | ||||
-rw-r--r-- | qtmips_machine/core.cpp | 2 | ||||
-rw-r--r-- | qtmips_machine/instruction.cpp | 2 | ||||
-rw-r--r-- | qtmips_machine/machinedefs.h | 27 |
4 files changed, 21 insertions, 24 deletions
diff --git a/qtmips_machine/alu.cpp b/qtmips_machine/alu.cpp index fa9b7d2..8016444 100644 --- a/qtmips_machine/alu.cpp +++ b/qtmips_machine/alu.cpp @@ -45,6 +45,8 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u discard = false; switch(operation) { + case ALU_OP_NOP: + return 0; case ALU_OP_SLL: return t << sa; case ALU_OP_SRL: @@ -59,12 +61,6 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u case ALU_OP_SRAV: // Note: same note as in case of SRA return (std::int32_t)t >> s; - case ALU_OP_JR: - // Do nothing as we solve this when we are handling program counter in instruction decode (handle_pc) - return 0; - case ALU_OP_JALR: - // Pass return value in rt to save PC after isntruction, program counter is handled in handle_pc - return t; case ALU_OP_MOVZ: // Signal discard of result when condition is not true discard = t != 0; @@ -73,8 +69,6 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u // Same note as for MOVZ applies here discard = t == 0; return discard ? 0: s; - case ALU_OP_BREAK: - return 0; case ALU_OP_MFHI: return regs->read_hi_lo(true); case ALU_OP_MTHI: @@ -136,6 +130,10 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u return t << 16; case ALU_OP_PASS_T: // Pass s argument without change for JAL return t; + case ALU_OP_BREAK: + return 0; + case ALU_OP_SYSCALL: // Pass s argument without change for JAL + return 0; default: throw QTMIPS_EXCEPTION(UnsupportedAluOperation, "Unknown ALU operation", QString::number(operation, 16)); } diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 8bf3977..b75e31b 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -231,7 +231,7 @@ struct Core::dtMemory Core::memory(const struct dtExecute &dt) { emit memory_memwrite_value(memwrite); emit memory_regw_num_value(dt.rwrite); - if (dt.excause == EXCAUSE_BREAK) + if ((dt.excause == EXCAUSE_BREAK) || (dt.excause == EXCAUSE_SYSCALL)) emit memory_break_reached(); return { diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp index 8aea469..9df45d8 100644 --- a/qtmips_machine/instruction.cpp +++ b/qtmips_machine/instruction.cpp @@ -98,7 +98,7 @@ static const struct InstructionMap alu_instruction_map[] = { .flags = FLAGS_ALU_T_R_STD_SHV}, {"SRAV", IT_R, ALU_OP_SRAV, NOMEM, nullptr, .flags = FLAGS_ALU_T_R_STD_SHV}, - {"JR", IT_R, ALU_OP_JR, NOMEM, nullptr, + {"JR", IT_R, ALU_OP_NOP, NOMEM, nullptr, .flags = IMF_SUPPORTED | IMF_BJR_REQ_RS | IMF_JUMP}, {"JALR", IT_R, ALU_OP_PASS_T, NOMEM, nullptr, .flags = IMF_SUPPORTED | IMF_REGD | IMF_REGWRITE | IMF_BJR_REQ_RS | IMF_PC8_TO_RT | IMF_JUMP}, diff --git a/qtmips_machine/machinedefs.h b/qtmips_machine/machinedefs.h index f4a4a81..526a05e 100644 --- a/qtmips_machine/machinedefs.h +++ b/qtmips_machine/machinedefs.h @@ -57,26 +57,24 @@ enum ExceptionCause { }; enum AluOp : std::uint8_t { - ALU_OP_SLL = 0, - ALU_OP_SRL = 2, + ALU_OP_NOP, + ALU_OP_SLL, + ALU_OP_SRL, ALU_OP_SRA, ALU_OP_SLLV, - ALU_OP_SRLV = 6, + ALU_OP_SRLV, ALU_OP_SRAV, - ALU_OP_JR, - ALU_OP_JALR, ALU_OP_MOVZ, ALU_OP_MOVN, - ALU_OP_BREAK = 13, - ALU_OP_MFHI = 16, + ALU_OP_MFHI, ALU_OP_MTHI, ALU_OP_MFLO, ALU_OP_MTLO, - ALU_OP_MULT = 24, - ALU_OP_MULTU = 25, - ALU_OP_DIV = 26, - ALU_OP_DIVU = 27, - ALU_OP_ADD = 32, + ALU_OP_MULT, + ALU_OP_MULTU, + ALU_OP_DIV, + ALU_OP_DIVU, + ALU_OP_ADD, ALU_OP_ADDU, ALU_OP_SUB, ALU_OP_SUBU, @@ -84,10 +82,11 @@ enum AluOp : std::uint8_t { ALU_OP_OR, ALU_OP_XOR, ALU_OP_NOR, - ALU_OP_SLT = 42, + ALU_OP_SLT, ALU_OP_SLTU, - ALU_OP_LUI = 64, // We don't care about exact index for this one + ALU_OP_LUI, // We don't care about exact index for this one ALU_OP_PASS_T, // Pass t argument without change for JAL + ALU_OP_BREAK, ALU_OP_SYSCALL, ALU_OP_UNKNOWN, ALU_OP_LAST // First impossible operation (just to be sure that we don't overflow) |