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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-24 23:48:08 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-24 23:48:08 +0100 |
commit | 076d85eaeeeb5ca37cfa6836cb8dd3c5368cf424 (patch) | |
tree | 15143d93287de21d195e029b8e8addf32ef65d3e /qtmips_machine/qtmipsexception.cpp | |
parent | 2b69b415e020901c00ad1699cbd8dedd236442d4 (diff) | |
download | qtmips-076d85eaeeeb5ca37cfa6836cb8dd3c5368cf424.tar.gz qtmips-076d85eaeeeb5ca37cfa6836cb8dd3c5368cf424.tar.bz2 qtmips-076d85eaeeeb5ca37cfa6836cb8dd3c5368cf424.zip |
Correct relative jumps range and adjust it for single core without delay-slot.
Setting bits 16 to 31 to 1 is incorrect, offset is shift
by two so bit 16 can be zero for jumps in range -64k to -128k.
Adjust relative offsets to compute target address same, as if there
is delay slot, for CPU variant without delay slot.
This allows to use same/standard MIPS assembler for mode
without delay slots.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/qtmipsexception.cpp')
0 files changed, 0 insertions, 0 deletions