Implemented base for exception handling.

Memory stage is chosen to be exception commit stage.

Instructions flow postponed and stages holding following
instructions are cleaned. Processing of syscall at decode
stage as jump to the handler would be better solution
in real hardware but for future emulated syscalls
it is better to reach consistent state of registers.
Memory access caused exceptions would require cleanup
even in real hardware.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>

1 files changed, 7 insertions, 0 deletions

diff --git a/qtmips_machine/machinedefs.h b/qtmips_machine/machinedefs.h
index 2e419a8..f4a4a81 100644
--- a/qtmips_machine/machinedefs.h
+++ b/qtmips_machine/machinedefs.h
@@ -50,6 +50,12 @@ enum AccessControl {
     AC_CACHE_OP,
 };
 
+enum ExceptionCause {
+    EXCAUSE_NONE,
+    EXCAUSE_BREAK,
+    EXCAUSE_SYSCALL,
+};
+
 enum AluOp : std::uint8_t {
     ALU_OP_SLL = 0,
     ALU_OP_SRL = 2,
@@ -82,6 +88,7 @@ enum AluOp : std::uint8_t {
     ALU_OP_SLTU,
     ALU_OP_LUI = 64, // We don't care about exact index for this one
     ALU_OP_PASS_T, // Pass t argument without change for JAL
+    ALU_OP_SYSCALL,
     ALU_OP_UNKNOWN,
     ALU_OP_LAST // First impossible operation (just to be sure that we don't overflow)
 };