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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-03-05 21:25:24 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-03-05 21:25:24 +0100
commit576c4381be6980f95d63ea91f8737dfc22fa8dbe (patch)
tree23fc5f9b613babae0c89e4e726649e12317796dd /qtmips_machine/instruction.h
parent675ede8c34671415bc423e6360ffe0de12d49ec8 (diff)
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Complete revamp of disassembler and assembler arguments processing.
Instructions description in instruction.cpp has been pragmatically augmented by tool based on Python MIPS simulator, hazards analyzer https://github.com/ppisa/apo-simarch That code has been originally distilled from from GNU binutils sources. Implementation is now inline with my original proposal Previous solution gets untenable with more complex instructions and its complexity would grow extremely. MIPS instruction set with coprocessor instructions which use sel field, rd used as index, rt as destination and other peculiarities in newer versions cannot be processed based on basic CPU control signals. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/instruction.h')
-rw-r--r--qtmips_machine/instruction.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/qtmips_machine/instruction.h b/qtmips_machine/instruction.h
index a3bfb79..f86d10c 100644
--- a/qtmips_machine/instruction.h
+++ b/qtmips_machine/instruction.h
@@ -117,7 +117,7 @@ public:
QString to_str(std::int32_t inst_addr = 0) const;
- static Instruction from_string(QString str, bool *pok = nullptr);
+ static Instruction from_string(QString str, bool *pok = nullptr, std::uint32_t inst_addr = 0);
private:
std::uint32_t dt;
};