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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-08 13:52:59 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-08 13:52:59 +0100
commit789186fd63fb3fb63af1d8875cbe43609321b9d8 (patch)
treeaf800264aeb46dc839b4d209833420f9de4f632b /qtmips_machine/instruction.cpp
parent6b639c50c93e4a682b15dcdf20f3d46a47d68a64 (diff)
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Implement LL and SC as simple load and store word. SC returns 1 unconditionally.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/instruction.cpp')
-rw-r--r--qtmips_machine/instruction.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/qtmips_machine/instruction.cpp b/qtmips_machine/instruction.cpp
index 393760c..d72dc7d 100644
--- a/qtmips_machine/instruction.cpp
+++ b/qtmips_machine/instruction.cpp
@@ -361,7 +361,8 @@ static const struct InstructionMap instruction_map[] = {
.flags = IMF_MEM | IMF_MEM_STORE},
{"CACHE", IT_I, ALU_OP_ADDU, AC_CACHE_OP, nullptr, // CACHE
.flags = IMF_SUPPORTED | IMF_ALUSRC | IMF_MEM| IMF_MEM_STORE},
- IM_UNKNOWN, // 48
+ {"LL", IT_I, ALU_OP_ADDU, AC_LOAD_LINKED, nullptr, // LL
+ .flags = FLAGS_ALU_I_LOAD},
IM_UNKNOWN, // 49
IM_UNKNOWN, // 50
IM_UNKNOWN, // 51
@@ -369,7 +370,8 @@ static const struct InstructionMap instruction_map[] = {
IM_UNKNOWN, // 53
IM_UNKNOWN, // 54
IM_UNKNOWN, // 55
- IM_UNKNOWN, // 56
+ {"SC", IT_I, ALU_OP_ADDU, AC_STORE_CONDITIONAL, nullptr, // SW
+ .flags = FLAGS_ALU_I_STORE | IMF_MEMREAD | IMF_REGWRITE},
IM_UNKNOWN, // 57
IM_UNKNOWN, // 58
IM_UNKNOWN, // 59