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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-03-25 23:13:31 +0100 |
|---|---|---|
| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-03-25 23:54:51 +0100 |
| commit | 635567e0564db4d19741b2478a4129fccb76f64a (patch) | |
| tree | b358007ad61d4cc1ae889e851c220ab892f377bf /qtmips_machine/core.h | |
| parent | 50361206f7fdccc911ae9dc8095f6304fcb9bc95 (diff) | |
| download | qtmips-635567e0564db4d19741b2478a4129fccb76f64a.tar.gz qtmips-635567e0564db4d19741b2478a4129fccb76f64a.tar.bz2 qtmips-635567e0564db4d19741b2478a4129fccb76f64a.zip | |
Highlight instructions passing through the pipeline stages.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/core.h')
| -rw-r--r-- | qtmips_machine/core.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h index 52cadb4..5658726 100644 --- a/qtmips_machine/core.h +++ b/qtmips_machine/core.h @@ -186,6 +186,7 @@ protected: uint32_t inst_addr; // Address of instruction enum ExceptionCause excause; bool in_delay_slot; + bool is_valid; }; struct dtDecode { Instruction inst; @@ -222,6 +223,7 @@ protected: bool in_delay_slot; bool stall; bool stop_if; + bool is_valid; }; struct dtExecute { Instruction inst; @@ -236,6 +238,7 @@ protected: enum ExceptionCause excause; bool in_delay_slot; bool stop_if; + bool is_valid; }; struct dtMemory { Instruction inst; @@ -248,6 +251,7 @@ protected: enum ExceptionCause excause; bool in_delay_slot; bool stop_if; + bool is_valid; }; struct dtFetch fetch(bool skip_break = false); |