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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-24 23:48:08 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-24 23:48:08 +0100
commit076d85eaeeeb5ca37cfa6836cb8dd3c5368cf424 (patch)
tree15143d93287de21d195e029b8e8addf32ef65d3e /qtmips_machine/core.h
parent2b69b415e020901c00ad1699cbd8dedd236442d4 (diff)
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Correct relative jumps range and adjust it for single core without delay-slot.
Setting bits 16 to 31 to 1 is incorrect, offset is shift by two so bit 16 can be zero for jumps in range -64k to -128k. Adjust relative offsets to compute target address same, as if there is delay slot, for CPU variant without delay slot. This allows to use same/standard MIPS assembler for mode without delay slots. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/core.h')
-rw-r--r--qtmips_machine/core.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/qtmips_machine/core.h b/qtmips_machine/core.h
index f70a19d..1c44550 100644
--- a/qtmips_machine/core.h
+++ b/qtmips_machine/core.h
@@ -245,7 +245,7 @@ protected:
struct dtExecute execute(const struct dtDecode&);
struct dtMemory memory(const struct dtExecute&);
void writeback(const struct dtMemory&);
- bool handle_pc(const struct dtDecode&);
+ bool handle_pc(const struct dtDecode&, std::int32_t rel_adj = 0);
enum ExceptionCause memory_special(enum AccessControl memctl,
int mode, bool memread, bool memwrite,