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author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-11 18:40:40 +0100 |
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committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-02-11 18:40:40 +0100 |
commit | bb7092e96401e4c89c44773c932788c9b0f87b53 (patch) | |
tree | c888153bbdeb52f1c882af1c92fb6e1e9ebe894b /qtmips_machine/core.cpp | |
parent | 10f4d52221438f0d5ce7cc72c5b6c1f6720ef5c6 (diff) | |
download | qtmips-bb7092e96401e4c89c44773c932788c9b0f87b53.tar.gz qtmips-bb7092e96401e4c89c44773c932788c9b0f87b53.tar.bz2 qtmips-bb7092e96401e4c89c44773c932788c9b0f87b53.zip |
Basic "hardware" breakpoints support implemented.
It works like real inserted breakpoint on hardware.
Breakpoint has to be removed to allow code continue
because else instruction is refetch and breakpoint
triggers again. The single step function should
resolve temporal masking of the breakpoint.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/core.cpp')
-rw-r--r-- | qtmips_machine/core.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/qtmips_machine/core.cpp b/qtmips_machine/core.cpp index 68dbe0b..7c92949 100644 --- a/qtmips_machine/core.cpp +++ b/qtmips_machine/core.cpp @@ -83,7 +83,7 @@ Core::hwBreak::hwBreak(std::uint32_t addr) { count = 0; } -void Core::inser_hwbreak(std::uint32_t address) { +void Core::insert_hwbreak(std::uint32_t address) { hw_breaks.insert(address, new hwBreak(address)); } @@ -118,9 +118,9 @@ bool Core::handle_exception(Core *core, Registers *regs, ExceptionCause excause, { if (excause == EXCAUSE_HWBREAK) { if (in_delay_slot) - regs->pc_abs_jmp(inst_addr); - else regs->pc_abs_jmp(jump_branch_pc); + else + regs->pc_abs_jmp(inst_addr); } ExceptionHandler *exhandler = ex_handlers.value(excause); |