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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-05 10:16:37 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-05 10:16:37 +0100
commitfc343acc4d81d06e5cba92b74de3565b6d12dfcf (patch)
treee5ed151f568d687eab36245e408b705eab5c0690 /qtmips_machine/alu.cpp
parentb4118e4b758bd82010a9004167f75f176aba8397 (diff)
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Correct shift operation and make ALU_OP_MOVZ and ALU_OP_MOVN encoding independent.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Diffstat (limited to 'qtmips_machine/alu.cpp')
-rw-r--r--qtmips_machine/alu.cpp11
1 files changed, 7 insertions, 4 deletions
diff --git a/qtmips_machine/alu.cpp b/qtmips_machine/alu.cpp
index f83c4b2..83e73bb 100644
--- a/qtmips_machine/alu.cpp
+++ b/qtmips_machine/alu.cpp
@@ -39,9 +39,10 @@
using namespace machine;
-std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::uint32_t t, std::uint8_t sa, Registers *regs) {
+std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::uint32_t t, std::uint8_t sa, Registers *regs, bool &discard) {
std::int64_t s64_val;
std::uint64_t u64_val;
+ discard = false;
switch(operation) {
case ALU_OP_SLL:
@@ -65,11 +66,13 @@ std::uint32_t machine::alu_operate(enum AluOp operation, std::uint32_t s, std::u
// Pass return value in rt to save PC after isntruction, program counter is handled in handle_pc
return t;
case ALU_OP_MOVZ:
- // We do this just to implement valid alu operation but we have to evaluate comparison outside of this function to disable register write
- return t == 0 ? s : 0;
+ // Signal discard of result when condition is not true
+ discard = t != 0;
+ return discard ? 0: s;
case ALU_OP_MOVN:
// Same note as for MOVZ applies here
- return t != 0 ? s : 0;
+ discard = t == 0;
+ return discard ? 0: s;
case ALU_OP_BREAK:
return 0;
case ALU_OP_MFHI: