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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-03-04 22:38:34 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-03-04 22:38:34 +0100
commit73886d9d1733368fe3c876c8e613ba5821e12944 (patch)
tree98dfefd703835f773b5adf72d9cd1f2e2cd1fe04 /compiler/config
parent1dc09ab41ae703a1f15be87cacab5e842cf1a09d (diff)
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Use irq 3 (HW1) for Rx and irq 2 (HW0) for Tx to be compatible with SPIM.
Jump to address 0x8000180 by default and to EBase + 0x180 when EBase is set to be compatible with real MIPS CPU. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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