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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-06 23:17:47 +0100
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2019-02-06 23:17:47 +0100
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Implemented base for exception handling.
Memory stage is chosen to be exception commit stage. Instructions flow postponed and stages holding following instructions are cleaned. Processing of syscall at decode stage as jump to the handler would be better solution in real hardware but for future emulated syscalls it is better to reach consistent state of registers. Memory access caused exceptions would require cleanup even in real hardware. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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