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| author | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-06-28 13:33:12 +0200 |
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| committer | Pavel Pisa <pisa@cmp.felk.cvut.cz> | 2019-06-28 13:33:12 +0200 |
| commit | f51b0a34cdcfe70f57add0e36dd3b34e3dbc83db (patch) | |
| tree | 9080dab817288d5be65c4447ec2d4404b9cc35f3 | |
| parent | 682dd7b7e66db2b004e1548db5da4e3942de21c1 (diff) | |
| download | qtmips-f51b0a34cdcfe70f57add0e36dd3b34e3dbc83db.tar.gz qtmips-f51b0a34cdcfe70f57add0e36dd3b34e3dbc83db.tar.bz2 qtmips-f51b0a34cdcfe70f57add0e36dd3b34e3dbc83db.zip | |
Document limitation of memory view which is not usable for frame-buffer access.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
| -rw-r--r-- | README.md | 4 |
1 files changed, 4 insertions, 0 deletions
@@ -201,6 +201,10 @@ component in bits 5 .. 10 and blue component in bits 0 .. 4. #define LCD_FB_START 0xffe00000 #define LCD_FB_END 0xffe4afff ``` +Limitation: actual concept of memory view updates and access +doesnot allows to reliably read peripheral registers and I/O +memory content. It is possible to write into framebuffer memory +when cached (from CPU perspective) access to memory is selected. Interrupts and Coprocessor 0 Support ------------------------------------ |