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Diffstat (limited to 'pkgs/patches-linux-5.15/779-v5.16-1-net-mvpp2-populate-supported_interfaces-member.patch')
-rw-r--r--pkgs/patches-linux-5.15/779-v5.16-1-net-mvpp2-populate-supported_interfaces-member.patch62
1 files changed, 62 insertions, 0 deletions
diff --git a/pkgs/patches-linux-5.15/779-v5.16-1-net-mvpp2-populate-supported_interfaces-member.patch b/pkgs/patches-linux-5.15/779-v5.16-1-net-mvpp2-populate-supported_interfaces-member.patch
new file mode 100644
index 0000000..28c7134
--- /dev/null
+++ b/pkgs/patches-linux-5.15/779-v5.16-1-net-mvpp2-populate-supported_interfaces-member.patch
@@ -0,0 +1,62 @@
+From 7d3f249f553251b6167feb8259b85699239eb64a Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Wed, 27 Oct 2021 10:49:14 +0100
+Subject: [PATCH 1/4] net: mvpp2: populate supported_interfaces member
+
+Populate the phy interface mode bitmap for the Marvell mvpp2 driver
+with interfaces modes supported by the MAC.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 34 +++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+index 3c267a94f1ca..d765559f7bd0 100644
+--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
++++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+@@ -6941,6 +6941,40 @@ static int mvpp2_port_probe(struct platform_device *pdev,
+ port->phylink_config.dev = &dev->dev;
+ port->phylink_config.type = PHYLINK_NETDEV;
+
++ if (mvpp2_port_supports_xlg(port)) {
++ __set_bit(PHY_INTERFACE_MODE_10GBASER,
++ port->phylink_config.supported_interfaces);
++ __set_bit(PHY_INTERFACE_MODE_XAUI,
++ port->phylink_config.supported_interfaces);
++ }
++
++ if (mvpp2_port_supports_rgmii(port))
++ phy_interface_set_rgmii(port->phylink_config.supported_interfaces);
++
++ if (comphy) {
++ /* If a COMPHY is present, we can support any of the
++ * serdes modes and switch between them.
++ */
++ __set_bit(PHY_INTERFACE_MODE_SGMII,
++ port->phylink_config.supported_interfaces);
++ __set_bit(PHY_INTERFACE_MODE_1000BASEX,
++ port->phylink_config.supported_interfaces);
++ __set_bit(PHY_INTERFACE_MODE_2500BASEX,
++ port->phylink_config.supported_interfaces);
++ } else if (phy_mode == PHY_INTERFACE_MODE_2500BASEX) {
++ /* No COMPHY, with only 2500BASE-X mode supported */
++ __set_bit(PHY_INTERFACE_MODE_2500BASEX,
++ port->phylink_config.supported_interfaces);
++ } else if (phy_mode == PHY_INTERFACE_MODE_1000BASEX ||
++ phy_mode == PHY_INTERFACE_MODE_SGMII) {
++ /* No COMPHY, we can switch between 1000BASE-X and SGMII
++ */
++ __set_bit(PHY_INTERFACE_MODE_1000BASEX,
++ port->phylink_config.supported_interfaces);
++ __set_bit(PHY_INTERFACE_MODE_SGMII,
++ port->phylink_config.supported_interfaces);
++ }
++
+ phylink = phylink_create(&port->phylink_config, port_fwnode,
+ phy_mode, &mvpp2_phylink_ops);
+ if (IS_ERR(phylink)) {
+--
+2.35.1
+