diff options
Diffstat (limited to 'pkgs/patches-linux-5.15/777-v5.16-1-net-dpaa2-mac-add-support-for-more-ethtool-10G-link-.patch')
| -rw-r--r-- | pkgs/patches-linux-5.15/777-v5.16-1-net-dpaa2-mac-add-support-for-more-ethtool-10G-link-.patch | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/pkgs/patches-linux-5.15/777-v5.16-1-net-dpaa2-mac-add-support-for-more-ethtool-10G-link-.patch b/pkgs/patches-linux-5.15/777-v5.16-1-net-dpaa2-mac-add-support-for-more-ethtool-10G-link-.patch new file mode 100644 index 0000000..a54e4c5 --- /dev/null +++ b/pkgs/patches-linux-5.15/777-v5.16-1-net-dpaa2-mac-add-support-for-more-ethtool-10G-link-.patch @@ -0,0 +1,45 @@ +From bc4b596770b44bbea030175bb2c48be4b08df543 Mon Sep 17 00:00:00 2001 +From: Russell King <rmk+kernel@armlinux.org.uk> +Date: Fri, 17 Sep 2021 14:41:17 +0100 +Subject: [PATCH 1/3] net: dpaa2-mac: add support for more ethtool 10G link + modes +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Phylink documentation says: + Note that the PHY may be able to transform from one connection + technology to another, so, eg, don't clear 1000BaseX just + because the MAC is unable to BaseX mode. This is more about + clearing unsupported speeds and duplex settings. The port modes + should not be cleared; phylink_set_port_modes() will help with this. + +So add the missing 10G modes. + +Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> +Acked-by: Marek Behún <kabel@kernel.org> +Acked-by: Ioana Ciornei <ioana.ciornei@nxp.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c +index ae6d382d8735..543c1f202420 100644 +--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c ++++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c +@@ -140,6 +140,11 @@ static void dpaa2_mac_validate(struct phylink_config *config, + case PHY_INTERFACE_MODE_10GBASER: + case PHY_INTERFACE_MODE_USXGMII: + phylink_set(mask, 10000baseT_Full); ++ phylink_set(mask, 10000baseCR_Full); ++ phylink_set(mask, 10000baseSR_Full); ++ phylink_set(mask, 10000baseLR_Full); ++ phylink_set(mask, 10000baseLRM_Full); ++ phylink_set(mask, 10000baseER_Full); + if (state->interface == PHY_INTERFACE_MODE_10GBASER) + break; + phylink_set(mask, 5000baseT_Full); +-- +2.35.1 + |