diff options
Diffstat (limited to 'pkgs/patches-linux-5.15/774-v5.16-08-net-dsa-rtl8366rb-Support-disabling-learning.patch')
| -rw-r--r-- | pkgs/patches-linux-5.15/774-v5.16-08-net-dsa-rtl8366rb-Support-disabling-learning.patch | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/pkgs/patches-linux-5.15/774-v5.16-08-net-dsa-rtl8366rb-Support-disabling-learning.patch b/pkgs/patches-linux-5.15/774-v5.16-08-net-dsa-rtl8366rb-Support-disabling-learning.patch new file mode 100644 index 0000000..8306eb5 --- /dev/null +++ b/pkgs/patches-linux-5.15/774-v5.16-08-net-dsa-rtl8366rb-Support-disabling-learning.patch @@ -0,0 +1,115 @@ +From 831a3d26bea0d14f8563eecf96def660a74a3000 Mon Sep 17 00:00:00 2001 +From: Linus Walleij <linus.walleij@linaro.org> +Date: Tue, 5 Oct 2021 21:47:02 +0200 +Subject: [PATCH 08/11] net: dsa: rtl8366rb: Support disabling learning +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The RTL8366RB hardware supports disabling learning per-port +so let's make use of this feature. Rename some unfortunately +named registers in the process. + +Suggested-by: Vladimir Oltean <olteanv@gmail.com> +Cc: Alvin Šipraga <alsi@bang-olufsen.dk> +Cc: Mauri Sandberg <sandberg@mailfence.com> +Cc: Florian Fainelli <f.fainelli@gmail.com> +Cc: DENG Qingfang <dqfext@gmail.com> +Reviewed-by: Vladimir Oltean <olteanv@gmail.com> +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +Signed-off-by: David S. Miller <davem@davemloft.net> +--- + drivers/net/dsa/rtl8366rb.c | 50 ++++++++++++++++++++++++++++++++----- + 1 file changed, 44 insertions(+), 6 deletions(-) + +--- a/drivers/net/dsa/rtl8366rb.c ++++ b/drivers/net/dsa/rtl8366rb.c +@@ -14,6 +14,7 @@ + + #include <linux/bitops.h> + #include <linux/etherdevice.h> ++#include <linux/if_bridge.h> + #include <linux/interrupt.h> + #include <linux/irqdomain.h> + #include <linux/irqchip/chained_irq.h> +@@ -42,9 +43,12 @@ + /* Port Enable Control register */ + #define RTL8366RB_PECR 0x0001 + +-/* Switch Security Control registers */ +-#define RTL8366RB_SSCR0 0x0002 +-#define RTL8366RB_SSCR1 0x0003 ++/* Switch per-port learning disablement register */ ++#define RTL8366RB_PORT_LEARNDIS_CTRL 0x0002 ++ ++/* Security control, actually aging register */ ++#define RTL8366RB_SECURITY_CTRL 0x0003 ++ + #define RTL8366RB_SSCR2 0x0004 + #define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0) + +@@ -927,13 +931,14 @@ static int rtl8366rb_setup(struct dsa_sw + /* layer 2 size, see rtl8366rb_change_mtu() */ + rb->max_mtu[i] = 1532; + +- /* Enable learning for all ports */ +- ret = regmap_write(smi->map, RTL8366RB_SSCR0, 0); ++ /* Disable learning for all ports */ ++ ret = regmap_write(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL, ++ RTL8366RB_PORT_ALL); + if (ret) + return ret; + + /* Enable auto ageing for all ports */ +- ret = regmap_write(smi->map, RTL8366RB_SSCR1, 0); ++ ret = regmap_write(smi->map, RTL8366RB_SECURITY_CTRL, 0); + if (ret) + return ret; + +@@ -1272,6 +1277,37 @@ static int rtl8366rb_vlan_filtering(stru + return ret; + } + ++static int ++rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port, ++ struct switchdev_brport_flags flags, ++ struct netlink_ext_ack *extack) ++{ ++ /* We support enabling/disabling learning */ ++ if (flags.mask & ~(BR_LEARNING)) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int ++rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port, ++ struct switchdev_brport_flags flags, ++ struct netlink_ext_ack *extack) ++{ ++ struct realtek_smi *smi = ds->priv; ++ int ret; ++ ++ if (flags.mask & BR_LEARNING) { ++ ret = regmap_update_bits(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL, ++ BIT(port), ++ (flags.val & BR_LEARNING) ? 0 : BIT(port)); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ + static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu) + { + struct realtek_smi *smi = ds->priv; +@@ -1682,6 +1718,8 @@ static const struct dsa_switch_ops rtl83 + .port_vlan_del = rtl8366_vlan_del, + .port_enable = rtl8366rb_port_enable, + .port_disable = rtl8366rb_port_disable, ++ .port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags, ++ .port_bridge_flags = rtl8366rb_port_bridge_flags, + .port_change_mtu = rtl8366rb_change_mtu, + .port_max_mtu = rtl8366rb_max_mtu, + }; |