diff options
Diffstat (limited to 'pkgs/patches-linux-5.15/0062-ARM-dts-armada-39x-Fix-assigned-addresses-for-every-.patch')
| -rw-r--r-- | pkgs/patches-linux-5.15/0062-ARM-dts-armada-39x-Fix-assigned-addresses-for-every-.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/pkgs/patches-linux-5.15/0062-ARM-dts-armada-39x-Fix-assigned-addresses-for-every-.patch b/pkgs/patches-linux-5.15/0062-ARM-dts-armada-39x-Fix-assigned-addresses-for-every-.patch new file mode 100644 index 0000000..849b2cf --- /dev/null +++ b/pkgs/patches-linux-5.15/0062-ARM-dts-armada-39x-Fix-assigned-addresses-for-every-.patch @@ -0,0 +1,53 @@ +From da049d058681865c4f31e393168e76a911e2d6df Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> +Date: Thu, 18 Aug 2022 00:04:33 +0200 +Subject: [PATCH 62/90] ARM: dts: armada-39x: Fix assigned-addresses for every + PCIe Root Port +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port +(PCI-to-PCI bridge) should match BDF in address part in that DT node name +as specified resource belongs to Marvell PCIe Root Port itself. + +Fixes: 538da83ddbea ("ARM: mvebu: add Device Tree files for Armada 39x SoC and board") +Signed-off-by: Pali Rohár <pali@kernel.org> +--- + arch/arm/boot/dts/armada-39x.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi +index 923b035a3ab3..9d1cac49c022 100644 +--- a/arch/arm/boot/dts/armada-39x.dtsi ++++ b/arch/arm/boot/dts/armada-39x.dtsi +@@ -463,7 +463,7 @@ pcie1_intc: interrupt-controller { + /* x1 port */ + pcie@2,0 { + device_type = "pci"; +- assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; ++ assigned-addresses = <0x82001000 0 0x40000 0 0x2000>; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; +@@ -492,7 +492,7 @@ pcie2_intc: interrupt-controller { + /* x1 port */ + pcie@3,0 { + device_type = "pci"; +- assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; ++ assigned-addresses = <0x82001800 0 0x44000 0 0x2000>; + reg = <0x1800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; +@@ -524,7 +524,7 @@ pcie3_intc: interrupt-controller { + */ + pcie@4,0 { + device_type = "pci"; +- assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; ++ assigned-addresses = <0x82002000 0 0x48000 0 0x2000>; + reg = <0x2000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; +-- +2.34.1 + |