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Diffstat (limited to 'pkgs/patches-linux-5.15/0057-ARM-dts-dove-Fix-assigned-addresses-for-every-PCIe-R.patch')
-rw-r--r--pkgs/patches-linux-5.15/0057-ARM-dts-dove-Fix-assigned-addresses-for-every-PCIe-R.patch35
1 files changed, 35 insertions, 0 deletions
diff --git a/pkgs/patches-linux-5.15/0057-ARM-dts-dove-Fix-assigned-addresses-for-every-PCIe-R.patch b/pkgs/patches-linux-5.15/0057-ARM-dts-dove-Fix-assigned-addresses-for-every-PCIe-R.patch
new file mode 100644
index 0000000..99f1872
--- /dev/null
+++ b/pkgs/patches-linux-5.15/0057-ARM-dts-dove-Fix-assigned-addresses-for-every-PCIe-R.patch
@@ -0,0 +1,35 @@
+From ebcb5a3c9803cacf33ff2d029325519a4e27ec66 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Wed, 17 Aug 2022 23:46:32 +0200
+Subject: [PATCH 57/90] ARM: dts: dove: Fix assigned-addresses for every PCIe
+ Root Port
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
+(PCI-to-PCI bridge) should match BDF in address part in that DT node name
+as specified resource belongs to Marvell PCIe Root Port itself.
+
+Fixes: 74ecaa403a74 ("ARM: dove: add PCIe controllers to SoC DT")
+Signed-off-by: Pali Rohár <pali@kernel.org>
+---
+ arch/arm/boot/dts/dove.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
+index 96ba47c061a7..70d45d2b1258 100644
+--- a/arch/arm/boot/dts/dove.dtsi
++++ b/arch/arm/boot/dts/dove.dtsi
+@@ -139,7 +139,7 @@ pcie0_intc: interrupt-controller {
+ pcie1: pcie@2 {
+ device_type = "pci";
+ status = "disabled";
+- assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
++ assigned-addresses = <0x82001000 0 0x80000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ clocks = <&gate_clk 5>;
+ marvell,pcie-port = <1>;
+--
+2.34.1
+