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-rw-r--r--pkgs/patches-linux-5.15/0021-PCI-mvebu-Update-comment-for-PCI_EXP_LNKCAP-register.patch34
1 files changed, 34 insertions, 0 deletions
diff --git a/pkgs/patches-linux-5.15/0021-PCI-mvebu-Update-comment-for-PCI_EXP_LNKCAP-register.patch b/pkgs/patches-linux-5.15/0021-PCI-mvebu-Update-comment-for-PCI_EXP_LNKCAP-register.patch
new file mode 100644
index 0000000..1239337
--- /dev/null
+++ b/pkgs/patches-linux-5.15/0021-PCI-mvebu-Update-comment-for-PCI_EXP_LNKCAP-register.patch
@@ -0,0 +1,34 @@
+From 91948e605b7b0f3f65919d6e19ef4e39535faf6a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Fri, 17 Sep 2021 11:54:37 +0200
+Subject: [PATCH 21/90] PCI: mvebu: Update comment for PCI_EXP_LNKCAP register
+ on emulated bridge
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Reason for clearing this bit is because mvebu hw returns incorrectly this bit set to 1.
+
+Signed-off-by: Pali Rohár <pali@kernel.org>
+---
+ drivers/pci/controller/pci-mvebu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
+index 94ef00b6d697..1aac65977b97 100644
+--- a/drivers/pci/controller/pci-mvebu.c
++++ b/drivers/pci/controller/pci-mvebu.c
+@@ -546,8 +546,8 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
+
+ case PCI_EXP_LNKCAP:
+ /*
+- * PCIe requires the clock power management capability to be
+- * hard-wired to zero for downstream ports
++ * PCIe requires that the Clock Power Management capability bit
++ * is hard-wired to zero for downstream ports but HW returns 1.
+ */
+ *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) &
+ ~PCI_EXP_LNKCAP_CLKPM;
+--
+2.34.1
+