diff options
Diffstat (limited to 'nixos/modules/kernel-patches/0078-debloat-add-kernel-config-option-to-disabling-common.patch')
| -rw-r--r-- | nixos/modules/kernel-patches/0078-debloat-add-kernel-config-option-to-disabling-common.patch | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/nixos/modules/kernel-patches/0078-debloat-add-kernel-config-option-to-disabling-common.patch b/nixos/modules/kernel-patches/0078-debloat-add-kernel-config-option-to-disabling-common.patch new file mode 100644 index 0000000..02d8db0 --- /dev/null +++ b/nixos/modules/kernel-patches/0078-debloat-add-kernel-config-option-to-disabling-common.patch @@ -0,0 +1,72 @@ +From 3cc791c22083c2e426fd5a722069c2e6d81f7ee1 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Tue, 27 Sep 2022 16:22:10 +0200 +Subject: [PATCH 78/96] debloat: add kernel config option to disabling common + PCI quirks + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +--- + drivers/pci/Kconfig | 7 +++++++ + drivers/pci/quirks.c | 7 +++++++ + 2 files changed, 14 insertions(+) + +diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig +index 133c73207782..70e2d7679199 100644 +--- a/drivers/pci/Kconfig ++++ b/drivers/pci/Kconfig +@@ -118,6 +118,13 @@ config XEN_PCIDEV_FRONTEND + The PCI device frontend driver allows the kernel to import arbitrary + PCI devices from a PCI backend to support PCI driver domains. + ++config PCI_DISABLE_COMMON_QUIRKS ++ bool "PCI disable common quirks" ++ depends on PCI ++ help ++ If you don't know what to do here, say N. ++ ++ + config PCI_ATS + bool + +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 2e68f50bc7ae..df09caf0dc8d 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct pci_dev *dev) + DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); + ++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS + /* + * The Mellanox Tavor device gives false positive parity errors. Disable + * parity error reporting. +@@ -3364,6 +3365,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f8, quirk_intel_mc_errata); + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); + ++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ ++ + /* + * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. + * To work around this, query the size it should be configured to by the +@@ -3389,6 +3392,8 @@ static void quirk_intel_ntb(struct pci_dev *dev) + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); + ++#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS ++ + /* + * Some BIOS implementations leave the Intel GPU interrupts enabled, even + * though no one is handling them (e.g., if the i915 driver is never +@@ -3427,6 +3432,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0106, disable_igfx_irq); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); + ++#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */ ++ + /* + * PCI devices which are on Intel chips can skip the 10ms delay + * before entering D3 mode. +-- +2.37.2 + |