aboutsummaryrefslogtreecommitdiff
path: root/nixos/modules/kernel-patches/0008-ARM-dts-mvebu-armada-385-turris-omnia-separate-dts-f.patch
diff options
context:
space:
mode:
Diffstat (limited to 'nixos/modules/kernel-patches/0008-ARM-dts-mvebu-armada-385-turris-omnia-separate-dts-f.patch')
-rw-r--r--nixos/modules/kernel-patches/0008-ARM-dts-mvebu-armada-385-turris-omnia-separate-dts-f.patch213
1 files changed, 213 insertions, 0 deletions
diff --git a/nixos/modules/kernel-patches/0008-ARM-dts-mvebu-armada-385-turris-omnia-separate-dts-f.patch b/nixos/modules/kernel-patches/0008-ARM-dts-mvebu-armada-385-turris-omnia-separate-dts-f.patch
new file mode 100644
index 0000000..a292738
--- /dev/null
+++ b/nixos/modules/kernel-patches/0008-ARM-dts-mvebu-armada-385-turris-omnia-separate-dts-f.patch
@@ -0,0 +1,213 @@
+From 03ba17e25dd41d414c00ddde855a36464698d2e1 Mon Sep 17 00:00:00 2001
+From: Tomas Hlavacek <tmshlvck@gmail.com>
+Date: Tue, 5 May 2020 20:40:24 +0200
+Subject: [PATCH 08/10] ARM: dts: mvebu: armada-385-turris-omnia: separate dts
+ for SFP and PHY
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The Turris Omnia board contains dual-personality ethernet NIC eth2 with
+two operation modes: 1) SFP cage and 2) metalic 1000BASE-X PHY.
+The differential pair carrying SGMII/1000BASE-X of eth2 is wired through
+a multiplexor driven by the module-detect signal from the SFP cage.
+The pin status can be read through I2C GPIO expander chip in userspace
+when the sfp driver module is unloaded and / or in U-Boot prior to the
+start of the kernel and the proper DTS file can be selected for the
+(floolowing) boot.
+
+Split DTS for Turris Omnia (that does not have any support for SFP cage)
+into three files:
+ armada-385-turris-omnia.dtsi - common base
+ armada-385-turris-omnia-sfp.dts - DT with the SFP configuration and
+PHY disabled
+ armada-385-turris-omnia-phy.dts - DT with the PHY configuration and
+SFP disabled
+
+Current DSA driver does not allow multiple CPU ports and Turris Omnia
+has two RGMII iterfaces wired between CPU and DSA switch.
+Disable the second CPU port until there is a suitable driver to use it.
+
+Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
+Signed-off-by: Marek Behún <marek.behun@nic.cz>
+---
+ arch/arm/boot/dts/Makefile | 3 +-
+ .../boot/dts/armada-385-turris-omnia-phy.dts | 22 ++++++++++++
+ .../boot/dts/armada-385-turris-omnia-sfp.dts | 23 ++++++++++++
+ ...omnia.dts => armada-385-turris-omnia.dtsi} | 35 +++++++++++--------
+ 4 files changed, 68 insertions(+), 15 deletions(-)
+ create mode 100644 arch/arm/boot/dts/armada-385-turris-omnia-phy.dts
+ create mode 100644 arch/arm/boot/dts/armada-385-turris-omnia-sfp.dts
+ rename arch/arm/boot/dts/{armada-385-turris-omnia.dts => armada-385-turris-omnia.dtsi} (94%)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 27eec8e670ec..f320ee8e2a00 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1495,7 +1495,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
+ armada-385-linksys-rango.dtb \
+ armada-385-linksys-shelby.dtb \
+ armada-385-synology-ds116.dtb \
+- armada-385-turris-omnia.dtb \
++ armada-385-turris-omnia-phy.dtb \
++ armada-385-turris-omnia-sfp.dtb \
+ armada-388-clearfog.dtb \
+ armada-388-clearfog-base.dtb \
+ armada-388-clearfog-pro.dtb \
+diff --git a/arch/arm/boot/dts/armada-385-turris-omnia-phy.dts b/arch/arm/boot/dts/armada-385-turris-omnia-phy.dts
+new file mode 100644
+index 000000000000..706f6a2f8065
+--- /dev/null
++++ b/arch/arm/boot/dts/armada-385-turris-omnia-phy.dts
+@@ -0,0 +1,22 @@
++// SPDX-License-Identifier: (GPL-2.0 OR MIT)
++/*
++ * Device Tree file for the Turris Omnia
++ *
++ * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
++ * Copyright (C) 2016-2019 Tomas Hlavacek <tmshlvkc@gmail.com>
++ *
++ * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
++ */
++
++/dts-v1/;
++
++#include "armada-385-turris-omnia.dtsi"
++
++&phy1 {
++ status = "okay";
++};
++
++&eth2 {
++ phy-mode = "sgmii";
++ phy = <&phy1>;
++};
+diff --git a/arch/arm/boot/dts/armada-385-turris-omnia-sfp.dts b/arch/arm/boot/dts/armada-385-turris-omnia-sfp.dts
+new file mode 100644
+index 000000000000..b9f2b88834be
+--- /dev/null
++++ b/arch/arm/boot/dts/armada-385-turris-omnia-sfp.dts
+@@ -0,0 +1,23 @@
++// SPDX-License-Identifier: (GPL-2.0 OR MIT)
++/*
++ * Device Tree file for the Turris Omnia
++ *
++ * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
++ * Copyright (C) 2016-2019 Tomas Hlavacek <tmshlvkc@gmail.com>
++ *
++ * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
++ */
++
++/dts-v1/;
++
++#include "armada-385-turris-omnia.dtsi"
++
++&sfp {
++ status = "okay";
++};
++
++&eth2 {
++ phy-mode = "sgmii";
++ managed = "in-band-status";
++ sfp = <&sfp>;
++};
+diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dtsi
+similarity index 94%
+rename from arch/arm/boot/dts/armada-385-turris-omnia.dts
+rename to arch/arm/boot/dts/armada-385-turris-omnia.dtsi
+index bcced203c612..58e3d86771db 100644
+--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
++++ b/arch/arm/boot/dts/armada-385-turris-omnia.dtsi
+@@ -8,8 +8,6 @@
+ * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
+ */
+
+-/dts-v1/;
+-
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/input/input.h>
+ #include <dt-bindings/leds/common.h>
+@@ -91,11 +89,11 @@ pcie@3,0 {
+ sfp: sfp {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfp_i2c>;
+- tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
+- tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
+- rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
+- los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
+- mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
++ tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
++ tx-disable-gpios = <&sfpgpio 1 GPIO_ACTIVE_HIGH>;
++ rate-select0-gpios = <&sfpgpio 2 GPIO_ACTIVE_HIGH>;
++ los-gpios = <&sfpgpio 3 GPIO_ACTIVE_HIGH>;
++ mod-def0-gpios = <&sfpgpio 4 GPIO_ACTIVE_LOW>;
+ maximum-power-milliwatt = <3000>;
+
+ /*
+@@ -147,7 +145,7 @@ fixed-link {
+ };
+ };
+
+-/* WAN port */
++/* WAN dual-personality port */
+ &eth2 {
+ /*
+ * eth2 is connected via a multiplexor to both the SFP cage and to
+@@ -158,9 +156,8 @@ &eth2 {
+ * is present, U-Boot has to enable the sfp node above, remove phy
+ * handle and add managed = "in-band-status" property.
+ */
++ phys = <&comphy5 2>;
+ status = "okay";
+- phy-mode = "sgmii";
+- phy-handle = <&phy1>;
+ phys = <&comphy5 2>;
+ sfp = <&sfp>;
+ buffer-manager = <&bm>;
+@@ -365,7 +362,7 @@ i2c@7 {
+ #size-cells = <0>;
+ reg = <7>;
+
+- pcawan: gpio@71 {
++ sfpgpio: gpio@71 {
+ /*
+ * GPIO expander for SFP+ signals and
+ * and phy irq
+@@ -374,7 +371,7 @@ pcawan: gpio@71 {
+ reg = <0x71>;
+
+ pinctrl-names = "default";
+- pinctrl-0 = <&pcawan_pins>;
++ pinctrl-0 = <&wanint_pins>;
+
+ interrupt-parent = <&gpio1>;
+ interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
+@@ -454,13 +451,23 @@ fixed-link {
+ };
+ };
+
+- /* port 6 is connected to eth0 */
++ ports@6 {
++ reg = <6>;
++ label = "cpu";
++ ethernet = <&eth0>;
++ phy-mode = "rgmii-id";
++
++ fixed-link {
++ speed = <1000>;
++ full-duplex;
++ };
++ };
+ };
+ };
+ };
+
+ &pinctrl {
+- pcawan_pins: pcawan-pins {
++ wanint_pins: wanint-pins {
+ marvell,pins = "mpp46";
+ marvell,function = "gpio";
+ };
+--
+2.37.2
+