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author | Karel Kočí <cynerd@email.cz> | 2015-03-22 14:05:00 +0100 |
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committer | Karel Kočí <cynerd@email.cz> | 2015-03-22 14:05:00 +0100 |
commit | a5bb06281011f4f0edd6f7b9331f149bd256d495 (patch) | |
tree | 7b576d3b3a737e94a601a236523612369152f52b | |
parent | 9447247c1ab0b0a02c5ec87c138135953986975c (diff) | |
download | avr-ioe-a5bb06281011f4f0edd6f7b9331f149bd256d495.tar.gz avr-ioe-a5bb06281011f4f0edd6f7b9331f149bd256d495.tar.bz2 avr-ioe-a5bb06281011f4f0edd6f7b9331f149bd256d495.zip |
SPI moved from src subfolder and mode changes
SPI USI should now work.
SPI USI is now documented.
Removing architecture specific folders in src.
-rw-r--r-- | files.mk | 9 | ||||
-rw-r--r-- | makefile | 1 | ||||
-rw-r--r-- | spi.h | 4 | ||||
-rw-r--r-- | spi_usart.h | 14 | ||||
-rw-r--r-- | spi_usi.h | 31 | ||||
-rw-r--r-- | src/spi.c (renamed from src/avr5/spi.c) | 30 | ||||
-rw-r--r-- | src/spi_usart.c | 14 | ||||
-rw-r--r-- | src/spi_usi.c (renamed from src/avr25/spi_usi.c) | 26 |
8 files changed, 91 insertions, 38 deletions
@@ -1,6 +1,11 @@ +ifndef IOE_PREFIX + IOE_PREFIX = . +endif -IOE_SPI_SRC = $(IOE_PREFIX)/src/avr5/spi.c -IOE_SPI_USI_SRC = $(IOE_PREFIX)/src/avr25/spi_usi.c +IOE_SPI_SRC = $(IOE_PREFIX)/src/spi.c +IOE_SPI_USI_SRC = $(IOE_PREFIX)/src/spi_usi.c +IOE_SPI_USART_SRC = $(IOE_PREFIX)/src/spi_usart.c IOE_SPI_OBJ = $(patsubst %.c,%.o,$(IOE_SPI_SRC)) IOE_SPI_USI_OBJ = $(patsubst %.c,%.o,$(IOE_SPI_USI_SRC)) +IOE_SPI_USART_OBJ = $(patsubst %.c,%.o,$(IOE_SPI_USART_SRC)) @@ -13,3 +13,4 @@ help: clean: $(RM) $(IOE_SPI_OBJ) $(RM) $(IOE_SPI_USI_OBJ) + $(RM) $(IOE_SPI_USART_OBJ) @@ -1,13 +1,11 @@ #include <avr/io.h> #include <stdint.h> -#include "mcu/mcu.h" - #ifndef _IOE_SPI_H_ #define _IOE_SPI_H_ inline void ioe_spi_init(void); -inline int ioe_spi_ready(void); +inline int ioe_spi_bussy(void); inline void ioe_spi_join(void); #ifdef IOE_SPI_MASTER inline int8_t ioe_spi_transfer(int8_t data); diff --git a/spi_usart.h b/spi_usart.h new file mode 100644 index 0000000..f29ac5b --- /dev/null +++ b/spi_usart.h @@ -0,0 +1,14 @@ +#include <stdio.h> +#include <avr/io.h> +#include <avr/interrupt.h> +#include <inttypes.h> + +#ifndef _IOE_SPI_USART_H_ +#define _IOE_SPI_USART_H_ + +inline void ioe_spi_usart_init(void); +inline int8_t ioe_spi_usart_transfer(int8_t); +inline int ioe_spi_usart_bussy(void); +inline void ioe_spi_usart_join(void); + +#endif /* _IOE_SPI_USART_H_ */ @@ -3,21 +3,44 @@ #include <avr/interrupt.h> #include <inttypes.h> -#include "mcu/mcu.h" - #ifndef _IOE_SPI_USI_H_ #define _IOE_SPI_USI_H_ +/* + * Initialize USI as SPI + * + * NOTE: Global interrupt must be enabled for right function. + * { SREG |= _BV(7) } + */ inline void ioe_spi_usi_init(void); #ifdef IOE_SPI_USI_MASTER +/* + * Swaps byte with slave over SPI. + */ inline int8_t ioe_spi_usi_transfer(int8_t data); #else +/* + * Expose data for next master request. + * Please don't use this when device is busy. + * Best place to call this is ioe_spi_usi_retrieve(). + */ inline void ioe_spi_usi_expose(int8_t data); -inline void ioe_spi_usi_expect(void); -inline int ioe_spi_usi_ready(void); +/* + * Returns NULL when device is no busy. + * When device is busy, returned value is number of already send bits. + */ +inline uint8_t ioe_spi_usi_busy(void); +/* + * Blocks processor until device is not busy. + */ inline void ioe_spi_usi_join(void); // Following function must be user defined +/* + * This function must be defined by user. + * This function is called every time transfer is finished. + * And until return from this function interrupts are disabled. + */ inline void ioe_spi_usi_retrieve(int8_t data); #endif /* IOE_SPI_USI_MASTER */ diff --git a/src/avr5/spi.c b/src/spi.c index bc026ef..8462905 100644 --- a/src/avr5/spi.c +++ b/src/spi.c @@ -1,35 +1,37 @@ -#include "../../spi.h" - -#if __AVR_ARCH__ == 5 +#include "../spi.h" +#include "mcu/mcu.h" inline void ioe_spi_join(void) { // TODO } +inline int ioe_spi_bussy(void) { +} + #ifdef IOE_SPI_MASTER inline void ioe_spi_init(void) { - // Set MOSI and SCK output, all other input - DDR_SPI = _BV(DD_MOSI) | _BV(DD_SCLK); - // Enable interrupt + // Set MOSI and SCK output + DDR_SPI |= _BV(DD_MOSI) | _BV(DD_SCLK); + // Set MISO pull up resistor + PORT_SPI |= _BV(PORT_MISO); + // Enable SPI interrupt SPCR |= _BV(SPIE); // Enable SPI master and set clock rate fck/16 SPCR = _BV(SPE) | _BV(MSTR) | _BV(SPR0); } -inline int ioe_spi_ready(void) { - // TODO -} - inline void ioe_spi_transfer(int8_t data) { SPDR = data; } #else /* IOE_SPI_MASTER */ inline void ioe_spi_init(void) { - // Set MISO as output, all other input + // Set MISO as output DDR_SPI = _BV(DD_MISO); - // Enable interrupt - SPCR |= _BV(SPIE); + // Set SCLK and MOSI pull up resistor + PORT_SPI |= _BV(PORT_SCLK) | _BV(PORT_MOSI); + // Enable SPI interrupt + SPCR |= _BV(SPIE); // Enable SPI SPCR = _BV(SPE); } @@ -43,5 +45,3 @@ inline void ioe_spi_expose(int8_t data) { SIGNAL(SPI_STC_vect) { ioe_spi_retrieve(SPDR); } - -#endif /* __AVR_ARCH__ == 5 */ diff --git a/src/spi_usart.c b/src/spi_usart.c new file mode 100644 index 0000000..40eb06d --- /dev/null +++ b/src/spi_usart.c @@ -0,0 +1,14 @@ +#include "../spi_usart.h" +#include "mcu/mcu.h" + +inline void ioe_spi_usart_init(void) { +} + +inline int8_t ioe_spi_usart_transfer(int8_t d) { +} + +inline int ioe_spi_usart_bussy(void) { +} + +inline void ioe_spi_usart_join(void) { +} diff --git a/src/avr25/spi_usi.c b/src/spi_usi.c index e63721a..7bdb5c2 100644 --- a/src/avr25/spi_usi.c +++ b/src/spi_usi.c @@ -1,13 +1,14 @@ -#include "../../spi_usi.h" - -#if __AVR_ARCH__ == 25 +#include "../spi_usi.h" +#include "../mcu/mcu.h" #ifdef IOE_SPI_USI_MASTER // TODO counter settings with interups inline void ioe_spi_usi_init(void) { - USI_DIR_REG |= _BV(USI_USCK_PIN) | _BV(USI_DO_PIN); - USI_OUT_REG |= _BV(USI_DI_PIN); + // Set USCK and DO as output + DDR_USI |= _BV(DD_USCK) | _BV(DD_DO); + // Set DI pull up resistor + PORT_USI |= _BV(PORT_DI); USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USICLK); } @@ -24,8 +25,10 @@ inline int8_t ioe_spi_usi_transfer(int8_t d) { #else /* IOE_SPI_USI_MASTER */ inline void ioe_spi_usi_init(void) { - USI_DIR_REG |= _BV(USI_DO_PIN); - USI_OUT_REG |= _BV(USI_USCK_PIN) | _BV(USI_DI_PIN); + // Set DO as output + DDR_USI |= _BV(DD_DO); + // Set USCK and DI pull up resistor + PORT_USI |= _BV(PORT_USCK) | _BV(PORT_DI); USICR |= _BV(USIWM0) | _BV(USICS1) | _BV(USIOIE); } @@ -34,11 +37,7 @@ inline void ioe_spi_usi_expose(int8_t data) { USIDR = data; } -inline void ioe_spi_usi_expect(void) { - USISR |= _BV(USIOIF); -} - -inline int ioe_spi_usi_busy(void) { +inline uint8_t ioe_spi_usi_busy(void) { return USISR & 0x0F; } @@ -49,8 +48,7 @@ inline void ioe_spi_usi_join(void) { SIGNAL(USI_OVF_vect) { ioe_spi_usi_retrieve(USIDR); + USISR |= _BV(USIOIF); } #endif /* IOE_SPI_USI_MASTER */ - -#endif /* __AVR_ARCH__ == 25 */ |