SPI implemented !NOT TESTED!

SPI for spi hardware implemented, but newer tested yet!

2 files changed, 68 insertions, 0 deletions

diff --git a/spi.h b/spi.h
new file mode 100644
index 0000000..acee3b5
--- /dev/null
+++ b/spi.h
@@ -0,0 +1,21 @@
+#include <avr/io.h>
+#include <stdint.h>
+
+#include "mcu/mcu.h"
+
+#ifndef _IOE_SPI_H_
+#define _IOE_SPI_H_
+
+inline void ioe_spi_init(void);
+inline int ioe_spi_ready(void);
+inline void ioe_spi_join(void);
+#ifdef IOE_SPI_MASTER
+inline int8_t ioe_spi_transfer(int8_t data);
+#else /* IOE_SPI_MASTER */
+inline void ioe_spi_expose(int8_t data);
+#endif /* IOE_SPI_MASTER */
+
+// Following function must be user defined
+inline void ioe_spi_retrieve(int8_t);
+
+#endif /* _IOE_SPI_H_ */
diff --git a/src/avr5/spi.c b/src/avr5/spi.c
new file mode 100644
index 0000000..bc026ef
--- /dev/null
+++ b/src/avr5/spi.c
@@ -0,0 +1,47 @@
+#include "../../spi.h"
+
+#if __AVR_ARCH__ == 5
+
+inline void ioe_spi_join(void) {
+    // TODO
+}
+
+#ifdef IOE_SPI_MASTER
+inline void ioe_spi_init(void) {
+    // Set MOSI and SCK output, all other input
+    DDR_SPI = _BV(DD_MOSI) | _BV(DD_SCLK);
+    // Enable interrupt
+    SPCR |= _BV(SPIE);
+    // Enable SPI master and set clock rate fck/16
+    SPCR = _BV(SPE) | _BV(MSTR) | _BV(SPR0);
+}
+
+inline int ioe_spi_ready(void) {
+    // TODO
+}
+
+inline void ioe_spi_transfer(int8_t data) {
+    SPDR = data;
+}
+
+#else /* IOE_SPI_MASTER */
+inline void ioe_spi_init(void) {
+    // Set MISO as output, all other input
+    DDR_SPI = _BV(DD_MISO);
+    // Enable interrupt
+    SPCR |= _BV(SPIE);          
+    // Enable SPI
+    SPCR = _BV(SPE);
+}
+
+inline void ioe_spi_expose(int8_t data) {
+    SPDR = data;
+}
+
+#endif /* IOE_SPI_MASTER */
+
+SIGNAL(SPI_STC_vect) {
+    ioe_spi_retrieve(SPDR);
+}
+
+#endif /* __AVR_ARCH__ == 5 */