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| author | Karel Kočí <karel.koci@nic.cz> | 2019-05-13 09:37:45 +0200 |
|---|---|---|
| committer | Karel Kočí <karel.koci@nic.cz> | 2019-05-13 09:37:45 +0200 |
| commit | 6958ded8646ecf287e413648e85a7a5738c2b261 (patch) | |
| tree | c16496a5553670f117565960dcbd30b6dc7da80f /turris-uart.pro | |
| parent | d84d3c8bb00dbdb25324e2f25b9ad1ec45a1c7cf (diff) | |
| download | turris-hw-uart-6958ded8646ecf287e413648e85a7a5738c2b261.tar.gz turris-hw-uart-6958ded8646ecf287e413648e85a7a5738c2b261.tar.bz2 turris-hw-uart-6958ded8646ecf287e413648e85a7a5738c2b261.zip | |
Diffstat (limited to 'turris-uart.pro')
| -rw-r--r-- | turris-uart.pro | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/turris-uart.pro b/turris-uart.pro new file mode 100644 index 0000000..55b3fc1 --- /dev/null +++ b/turris-uart.pro @@ -0,0 +1,60 @@ +update=Sun 12 May 2019 12:11:34 PM CEST +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead=turris-uart.net +CopperLayerCount=2 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.2 +MinViaDiameter=0.4 +MinViaDrill=0.3 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.25 +ViaDiameter1=0.8 +ViaDrill1=0.4 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.12 +SilkTextSizeV=1 +SilkTextSizeH=1 +SilkTextSizeThickness=0.15 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.05 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0.051 +SolderMaskMinWidth=0.25 +SolderPasteClearance=0 +SolderPasteRatio=0 |